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author:

Lin, Chenxi (Lin, Chenxi.) [1] | Qian, Hui (Qian, Hui.) [2] (Scholars:钱慧) | Wang, ZhongFeng (Wang, ZhongFeng.) [3]

Indexed by:

CPCI-S

Abstract:

To tackle the problem of inadequate performance in data processing on existing embedded systems, in this paper, we present a well-optimized parallel image processing scheme based on the NEON acceleration engine. It targets at the Prewitt operator, a classical image edge processing method with good properties including high precision and strong antinoise ability. However, it requires a high computational cost and leads to insufficient real-time processing capability. In this work, by exploring the parallel processing characteristics of the NEON engine, we concatenate R, G, B three-channel data in parallel, optimize the data processing schedule of the Prewitt operator and implement the real-time video processing on Xilinx's Zynq-7010 all programmable system-on-chip (APSOC) development platform. Experimental results demonstrate that the proposed design can achieve approximate 4 times speedup compared to a regular design using ARM C library. It is almost 2 orders of magnitude faster than using ARM Coretex-A9 without NEON.

Keyword:

Data Parallel Optimization Edge detection NEON plus ARM Rescheduling

Community:

  • [ 1 ] [Lin, Chenxi]Fuzhou Univ, Fujian Key Lab IoT Engn & Applicat, Fuzhou, Fujian, Peoples R China
  • [ 2 ] [Qian, Hui]Fuzhou Univ, Fujian Key Lab IoT Engn & Applicat, Fuzhou, Fujian, Peoples R China
  • [ 3 ] [Wang, ZhongFeng]Nanjing Univ, Nanjing, Jiangsu, Peoples R China

Reprint 's Address:

  • 林晨熹

    [Lin, Chenxi]Fuzhou Univ, Fujian Key Lab IoT Engn & Applicat, Fuzhou, Fujian, Peoples R China

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Source :

2018 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS 2018)

Year: 2018

Page: 270-273

Language: English

Cited Count:

WoS CC Cited Count: 0

SCOPUS Cited Count:

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 1

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