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This paper precented a phase-locked loop frequency synthesizer with almost constant loop bandwidth. In order to reduce the loop bandwidth variations caused by the LC-VCO gain, a calibration system is introduced, which sets the charge-pump current to be inversely proportional to the square of the divider ratio. The frequency synthesizer with this technique was fabricated in 0.13μm CMOS process. The measured results show that this method keeps the loop bandwidth almost a constant in frequency range of 2.44G∼2.8GHz while consuming less power with better in-band phase noise. © 2016 IEEE.
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Year: 2016
Language: English
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SCOPUS Cited Count: 2
ESI Highly Cited Papers on the List: 0 Unfold All
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30 Days PV: 1
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