Due　to　the　overlap　of　nonzero　sub-matrices　in　the　successive　layers　of　check　matrix,　the　pipeline　process　might　introduce　data　updating　conflict　in　pipelined　layered　LDPC　decoder.　A　solution　to　solve　this　problem　by　adjusting　the　decoding　order　of　layers　in　check　matrix　and　nonzero　sub-matrices　in　the　same　layer　is　proposed　in　this　paper.　Furthermore　the　corresponding　fast　algorithm　is　given.　In　term　of　hardware　implementation,　this　method　which　can　be　achieved　simply　by　changing　the　order　of　the　corresponding　data　in　the　ROMs　will　not　increase　any　extra　hardware　overhead.　Experimental　results　show　that　due　to　fewer　idle　clocks　even　zero　idle　clock　need　to　be　inserted　into　decoding　pipeline　when　using　this　solution,　the　decoding　rate　is　improved　effectively.　More　importantly,　the　method　will　not　degrade　the　decoding　performance　for　LDPC　codes.　©　2015　IEEE.