脑机接口的MapReduce计算模型 - Details

author：

黄志华 (黄志华.) ^[1] (Scholars：黄志华)

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Abstract：

研究了脑机接口各项计算任务的时间关系,把脑机接口的计算过程分成了三个阶段,并把前两个阶段映射为了MapReduce机制的Map和Reduce,提出了脑机接口的MapReduce计算模型.由于脑机接口的绝大多数计算量集中在前两个阶段,该模型能够显著减少脑机接口的计算时间.

Keyword：

MapReduce 分布并行计算脑机接口

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Source ：

福州大学学报（自然科学版）

ISSN： 1000-2243

CN： 35-1337/N

Year： 2013

Issue： 6

Volume： 41

Page： 981-985

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ESI Highly Cited Papers on the List： 0 Unfold All

WanFang Cited Count： -1

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30 Days PV： 2

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