The　Quasi-Newton　method　(QN)　is　widely　used　in　solving　large-scale　optimization　problems　due　to　its　high　efficiency.　However,　this　algorithm　requires　a　large　number　of　iterative　calculations,　which　is　more　time-consuming　to　compute　in　software.　The　Davidon-Fletcher-Powell　(DFP)　algorithm　has　been　implemented　on　field-programmable　gate　array　(FPGA)　in　order　to　speed　up　the　computation.　The　number　of　iterations　in　the　online　search　part　of　the　algorithm　is　excessive,　which　affects　the　speed　of　the　calculation.　In　order　to　solve　this　problem,　this　paper　proposes　a　hardware　implementation　of　DFP　algorithm　using　inexact　linear　search.　The　results　show　that　the　calculation　speed　of　the　DFP　algorithm　implemented　in　this　paper　on　the　software　side　and　FPGA　platform　is　increased　by　7.59　times　and　3.08　times,　respectively.　And　resource　consumption　and　accuracy　have　little　effect　on　the　results.　©　Content　from　this　work　may　be　used　under　the　terms　of　the　Creative　Commons　Attribution　3.0　Licence.