In　a　classical　receiver　architecture,　the　overall　performance　of　the　system　depends　on　the　phase　noise　and　the　power　consumption　of　the　oscillator,　therefore　low　power　consumption　and　low　phase　noise　have　become　the　essential　requirements　of　oscillators.　For　its　simplicity,　the　Pierce　structure　is　adopted　in　the　most　of　the　FBAR　oscillator.　In　this　structure,　the　power　consumption　is　mainly　determined　by　the　negative　resistance　generator　composed　of　the　amplifier　circuit.　Several　techniques　using　an　energy-efficient　amplifier　operating　in　the　weak-inversion　region　left(V　{o　v}lt　0right),　an　intermittent　amplifier,　and　a　pulsed　driver　have　been　reported　for　achieving　low-power　operation.　Unfortunately,　these　traditional　techniques　can　only　be　used　at　low　frequencies.　A　1.92　GHz　low-power　using　stacked　architecture　oscillator　with　a　high-Q　film　bulk　acoustic　resonator　(FBAR)　is　proposed　in　this　paper.　The　LC　tank　of　the　oscillator　is　replaced　by　a　high-Q　FBAR　to　obtain　low　phase　noise.　Stacked-Amplifier　is　introduced　into　the　oscillator　to　significantly　reduce　requirement　of　current.　Additionally,　the　oscillator　uses　self-forward-body-bias　technology,　which　greatly　reduces　the　minimum　supply　voltage　required　for　circuit　starting.　The　design　of　compensation　capacitor　is　added　to　neutralize　the　fluctuation　of　parasitic　capacitor　and　effectively　solve　the　deterioration　of　close-in　phase　noise　caused　by　AM-PM　modulation.　Active　part　of　the　class-C　oscillator　is　designed　in　180-nm　CMOS　technology.　The　simulation　results　show　that　the　power　consumption　of　the　FBAR-Based　oscillator　is　464.8　mu　W　at　nominal　3.3-V　supply　voltage,　achieves-133.56　dBc/Hz　phase　noise　at　100　kHz　offset　with　Figure-of-Merit　(FOM)　of　222.6　dB.　The　core　area　of　the　circuit　is　470　mu　m　∗　415　mu　m.　©　2021　IEEE.