Entropy　is　one　of　the　most　fundamental　notions　for　understanding　complexity.　Among　all　the　methods　to　calculate　the　entropy,　sample　entropy　(SampEn)　is　a　practical　and　common　method　to　estimate　time-series　complexity.　Unfortunately,　SampEn　is　a　time-consuming　method　growing　in　quadratic　times　with　the　number　of　elements,　which　makes　this　method　unviable　when　processing　large　data　series.　In　this　work,　we　evaluate　hardware　SampEn　architectures　to　offload　computation　weight,　using　improved　SampEn　algorithms　and　exploiting　reconfigurable　technologies,　such　as　field-programmable　gate　arrays　(FPGAs),　a　reconfigurable　technology　well-known　for　its　high　performance　and　power　efficiency.　In　addition　to　the　fundamental　disclosed　straightforward　SampEn　(SF)　calculation　method,　this　study　evaluates　optimized　strategies,　such　as　bucket-assist　(BA)　SampEn　and　lightweight　SampEn　based　on　BubbleSort　(BS-LW)　and　MergeSort　(MS-LW)　on　an　embedded　CPU,　a　high-performance　CPU　and　on　an　FPGA　using　simulated　data　and　real-world　electrocardiograms　(ECG)　as　input　data.　Irregular　storage　space　and　memory　access　of　enhanced　algorithms　is　also　studied　and　estimated　in　this　work.　These　fast　SampEn　algorithms　are　evaluated　and　profiled　using　metrics　such　as　execution　time,　resource　use,　power　and　energy　consumption　based　on　input　data　length.　Finally,　although　the　implementation　of　fast　SampEn　is　not　significantly　faster　than　versions　running　on　a　high-performance　CPU,　FPGA　implementations　consume　one　or　two　orders　of　magnitude　less　energy　than　a　high-performance　CPU.