Modern　circuits　often　contain　standard　cells　of　different　threshold　voltages　(multi-VTs)　to　achieve　a　better　trade-off　between　timing　and　power　consumption.　Due　to　the　heterogeneous　cell　structures,　the　multi-VTs　cells　impose　various　implant　layer　constraints,　further　complicating　the　already　time-consuming　filler　cell　insertion　process.　In　this　paper,　we　present　a　fast　and　near-optimal　algorithm　to　solve　the　filler　insertion　problem　with　complex　implant　layer　rules　and　minimum　filler　width　constraints.　We　first　propose　an　inference-driven　detecting　algorithm　to　identify　each　design　rule　violation　accurately.　Then,　a　dynamic-programming-based　insertion　method　is　developed　to　reduce　the　implant　layer　violations.　Finally,　we　design　a　contour-driven　violation　refinement　strategy　to　further　improve　manufacturability.　Experimental　results　show　that　our　algorithm　can　reduce　the　number　of　violations　significantly　compared　with　state-of-the-art　works.　Besides,　with　our　identifier　in　the　legalization　stage,　we　can　avoid　conflicts　in　advance　and　solve　almost　all　violations　after　filler　insertion　in　industrial　cases.　©　2023　IEEE.