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学者姓名：陈家瑞
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Abstract ：
In modern very large-scale integration (VLSI) design, the solution quality of the bus routing is a crucial factor that determines the timing and power of circuit, and finally affects the performance and yield of chips. Taking bus deviation as the main optimization objective, an effective multi-strategy bus deviation-driven layer assignment algorithm is proposed to solve the timing-matching problem of bus routing. First, a net priority determination method that integrates multiple features is presented to determine the layer assignment order, thus obtaining a routing sequence which can weigh the wirelength and bus deviation well. Second, an effective single net layer assignment algorithm is proposed to assign each net based on dynamic programming, thus reducing the number of vias. Third, a layer shifting strategy based on the bus lookup table is designed to effectively balance total wirelength and bus deviation by sacrificing a certain number of vias. Experimental results, compared to existing work, show that the proposed algorithm can achieve significant optimization on the bus deviation and total wirelength, and finally obtain the best results in terms of the bus deviation, which is the most important optimization objective for bus routing.
Keyword ：
bus deviation bus deviation bus lookup table bus lookup table layer assignment layer assignment layer shifting layer shifting VLSI VLSI
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| GB/T 7714 | Yu, Yantao , Li, Zepeng , Chen, Jiarui et al. Multi-Strategy Bus Deviation-Driven Layer Assignment Algorithm [J]. | 2024 INTERNATIONAL SYMPOSIUM OF ELECTRONICS DESIGN AUTOMATION, ISEDA 2024 , 2024 : 456-461 . |
| MLA | Yu, Yantao et al. "Multi-Strategy Bus Deviation-Driven Layer Assignment Algorithm" . | 2024 INTERNATIONAL SYMPOSIUM OF ELECTRONICS DESIGN AUTOMATION, ISEDA 2024 (2024) : 456-461 . |
| APA | Yu, Yantao , Li, Zepeng , Chen, Jiarui , Huang, Xing , Liu, Genggeng , Xu, Ning . Multi-Strategy Bus Deviation-Driven Layer Assignment Algorithm . | 2024 INTERNATIONAL SYMPOSIUM OF ELECTRONICS DESIGN AUTOMATION, ISEDA 2024 , 2024 , 456-461 . |
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Escape routing is a crucial step in printed circuit board (PCB) design. In response to the issues of low wiring efficiency in large-scale pin array circuit board routing where multiple devices synchronization is not considered in the current escape algorithm, this paper proposes a simultaneous escape routing algorithm based on weighted maximum independent set. Firstly, a path conflict graph is constructed by projecting paths correlated to pin pairs, followed by obtaining layered ordering results using the weighted maximum independent set model. Subsequently, channel estimation and channel optimization are performed using depth-first search in different directions. Finally, an escape routing is conducted using a detailed grid-based wiring method. Experimental results demonstrate that the proposed algorithm achieves a near 100% successful routing rate for large-scale pin array PCB cases. It outperforms the minimum cost multi-commodity flow (MMCF) algorithm and the sequential escape algorithm with estimated functions by an average improvement of 10% in wire length.
Keyword ：
Channel planning Channel planning Layered ordering Layered ordering Maximum independent set Maximum independent set Simultaneous escape routing Simultaneous escape routing
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| GB/T 7714 | Yang, Ze , Hu, Kunwei , Liu, Qinghai et al. Simultaneous Escape Routing Algorithm for Large-scale Pin Arrays [J]. | 2024 INTERNATIONAL SYMPOSIUM OF ELECTRONICS DESIGN AUTOMATION, ISEDA 2024 , 2024 : 386-391 . |
| MLA | Yang, Ze et al. "Simultaneous Escape Routing Algorithm for Large-scale Pin Arrays" . | 2024 INTERNATIONAL SYMPOSIUM OF ELECTRONICS DESIGN AUTOMATION, ISEDA 2024 (2024) : 386-391 . |
| APA | Yang, Ze , Hu, Kunwei , Liu, Qinghai , Chen, Jiarui . Simultaneous Escape Routing Algorithm for Large-scale Pin Arrays . | 2024 INTERNATIONAL SYMPOSIUM OF ELECTRONICS DESIGN AUTOMATION, ISEDA 2024 , 2024 , 386-391 . |
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Abstract ：
针对新工科背景下国产电子设计自动化(EDA)软件人才紧缺和培养难的状况,从教学内容调整、实践教学体系搭建和综合实践项目设置等方面提出"分层递进,产教融合"的模式,设计面向国产EDA人才培养的课程群实践教学体系,阐述如何采用课程群分层递进、一体化贯穿式,使实践教学体系可以有效覆盖各个层次的创新实践能力的培养,最后说明教学效果.
Keyword ：
EDA软件人才 EDA软件人才 创新实践能力 创新实践能力 实践教学体系 实践教学体系
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| GB/T 7714 | 陈家瑞 , 邓新国 , 陈振 . 面向国产EDA软件人才培养的课程群实践教学体系 [J]. | 计算机教育 , 2024 , (7) : 174-177 . |
| MLA | 陈家瑞 et al. "面向国产EDA软件人才培养的课程群实践教学体系" . | 计算机教育 7 (2024) : 174-177 . |
| APA | 陈家瑞 , 邓新国 , 陈振 . 面向国产EDA软件人才培养的课程群实践教学体系 . | 计算机教育 , 2024 , (7) , 174-177 . |
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Abstract ：
在印刷电路板布线中,逃逸布线是重要的组成部分.随着器件引脚数量不断增加,引脚阵列规模不断扩大,有序逃逸布线问题变得愈发复杂.针对目前有序逃逸布线研究中布线时间与质量无法兼顾的问题,提出一种结合启发式算法与改进整数线性规划的布线方案.该方案分为构建初始解与拆线重布二个阶段.在第一个阶段,先利用最长公共子序列给出逃逸引脚初步布线顺序,接着利用分段代价预估函数的启发式算法,在短时间内对大部分引脚进行预布线.在第二个阶段,首先确定子图范围,然后给出改进的整数线性规划表达式,在初始布线的基础上进行拆线重布,提高布通率的同时达到局部最优.最后再使用最短路径算法进行拆线重布,进一步提高总体布通率.实验结果表明,提出的布线方案能够在较短的时间内得到最优或近似最优的布线结果,相较于使用整数线性规划方案来进行布线,CPU时间平均减少35.57％.
Keyword ：
启发式算法 启发式算法 拆线重布 拆线重布 整数线性规划 整数线性规划 最短路径 最短路径 有序逃逸布线 有序逃逸布线
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| GB/T 7714 | 邓新国 , 叶似锦 , 陈家瑞 . 结合启发式算法与改进整数线性规划的有序逃逸布线 [J]. | 计算机集成制造系统 , 2024 , 30 (12) : 4302-4313 . |
| MLA | 邓新国 et al. "结合启发式算法与改进整数线性规划的有序逃逸布线" . | 计算机集成制造系统 30 . 12 (2024) : 4302-4313 . |
| APA | 邓新国 , 叶似锦 , 陈家瑞 . 结合启发式算法与改进整数线性规划的有序逃逸布线 . | 计算机集成制造系统 , 2024 , 30 (12) , 4302-4313 . |
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Legalized routing is an essential part of PCB automatic routing. It solves the problem of wiring conflicts and obtains routing results that comply with the constraints of design rules. Traditional legalized routing problems mostly use trial backtracking methods, but with increasing design complexity and design rules, avoiding wiring conflicts between networks has become increasingly challenging. This paper proposes a legalized routing algorithm based on linear programming to obtain the optimal wiring trajectory under specified topological constraints. First, the corresponding routing model was established based on numerous routing rules, and a routing grid diagram was found using obstacles as grid points. Secondly, a global routing algorithm was used to obtain the estimated wiring path, and integer linear programming was used to realize the mathematical modeling of the legalized routing problem. Finally, a multi-line simultaneous routing strategy was used to design and implement a detailed routing algorithm, optimizing the routing results. We use C++ to complete the coding work and thoroughly test the PCB use cases of different sizes. The experimental results show that our algorithm still maintains a 100% routing success rate, good time performance, and excellent routing quality with large-scale use cases compared with the trial backtracking method.
Keyword ：
detailed algorithm detailed algorithm escape routing escape routing integer linear programming integer linear programming printed circuit board printed circuit board
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| GB/T 7714 | Chen, Chuandong , Tong, Xin , Liu, Qinghai et al. Legalized Routing Algorithm Based on Linear Programming [J]. | ELECTRONICS , 2023 , 12 (20) . |
| MLA | Chen, Chuandong et al. "Legalized Routing Algorithm Based on Linear Programming" . | ELECTRONICS 12 . 20 (2023) . |
| APA | Chen, Chuandong , Tong, Xin , Liu, Qinghai , Chen, Jiarui , Lin, Zhifeng . Legalized Routing Algorithm Based on Linear Programming . | ELECTRONICS , 2023 , 12 (20) . |
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Abstract ：
Global routing plays a crucial role in printed circuit board (PCB) design and affects the cost of the design significantly. Conventional methods based on rectangular grids have some limitations, whereas this paper introduces a new algorithm that employs a triangular grid model, which offers a more efficient solution to the problem. Firstly, we present a technique to sort all unconnected two-pin nets. Next, a triangular grid graph is constructed to represent the routing resources on the printed circuit board. Finally, we use the concept of maximum flow to identify the paths for global routing and apply detailed routing for the completion of wires. Results from experiments demonstrate that our algorithm is faster than two state-of-the-art routers and does not have any design rule violations for all industrial PCB instances.
Keyword ：
global routing global routing maximum flow maximum flow triangular grid triangular grid
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| GB/T 7714 | Chen, Jiarui , Zhou, Yujing , Liu, Qinghai et al. A Novel Global Routing Algorithm for Printed Circuit Boards Based on Triangular Grid [J]. | ELECTRONICS , 2023 , 12 (24) . |
| MLA | Chen, Jiarui et al. "A Novel Global Routing Algorithm for Printed Circuit Boards Based on Triangular Grid" . | ELECTRONICS 12 . 24 (2023) . |
| APA | Chen, Jiarui , Zhou, Yujing , Liu, Qinghai , Zhang, Xinhong . A Novel Global Routing Algorithm for Printed Circuit Boards Based on Triangular Grid . | ELECTRONICS , 2023 , 12 (24) . |
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Abstract ：
Global routing is a critical problem in PCB routing, and its quality greatly affect the PCB design cost. Unlike existing methods based on traditional rectangular grid, this paper present a novel algorithm based on triangular grid model to handle the problem. We first propose a method to sort all the unconnected two-pin nets, then construct a triangular grid graph to represent the routing resources on the printed circuited board. Finally we use the idea of maximum flow to find the paths to complete global routing and use the detailed routing to get the result of completed wires. Experimental results show that our algorithm can spend less time than the two state-of-the-art routers without any design rule violations for all given industrial PCB instances. © 2023 IEEE.
Keyword ：
Printed circuit boards Printed circuit boards Printed circuit design Printed circuit design Routing algorithms Routing algorithms
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| GB/T 7714 | Zhou, Yujing , Liu, Qinghai , Zhang, Xinhong et al. A Global Routing Algorithm for PCB Based on Triangular Grid [C] . 2023 : 64-69 . |
| MLA | Zhou, Yujing et al. "A Global Routing Algorithm for PCB Based on Triangular Grid" . (2023) : 64-69 . |
| APA | Zhou, Yujing , Liu, Qinghai , Zhang, Xinhong , Chen, Jiarui . A Global Routing Algorithm for PCB Based on Triangular Grid . (2023) : 64-69 . |
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Abstract ：
逃逸布线是印刷电路板设计的一个重要组成部分。针对并行逃逸布线的方法用于较大规模电路板布线时速度慢且结果不够好的问题,该文提出一种结合改进A~*算法与拆线重布的有序逃逸布线方法。首先,通过代价预估函数确定引脚的布线顺序,使用改进A~*算法初始化有序逃逸布线。接着,优化同长度布线路径,调整拥挤区域布线路径。最后,使用A~*算法和广度优先搜索进行拆线重布。实验结果表明,该方法对给出的所有测试用例都实现了100%的逃逸,得到有序逃逸路径的可行解非常接近最优解,CPU时间比布尔可满足性问题(SAT)算法与最小费用多商品流(MMCF)算法平均减少分别约为95.6%, 97.8%,总体线长也接近最优。提出的...
Keyword ：
A~*算法 A~*算法 拆线重布 拆线重布 最短路径 最短路径 有序逃逸布线 有序逃逸布线
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| GB/T 7714 | 邓新国 , 叶似锦 , 陈家瑞 et al. 结合改进A~*算法与拆线重布的有序逃逸布线 [J]. | 电子与信息学报 , 2021 , 43 (06) : 1609-1616 . |
| MLA | 邓新国 et al. "结合改进A~*算法与拆线重布的有序逃逸布线" . | 电子与信息学报 43 . 06 (2021) : 1609-1616 . |
| APA | 邓新国 , 叶似锦 , 陈家瑞 , 陈传东 . 结合改进A~*算法与拆线重布的有序逃逸布线 . | 电子与信息学报 , 2021 , 43 (06) , 1609-1616 . |
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工艺参数选择是动力电池焊接行业面临的困难,为提升动力电池焊接效率并满足多项目标,采用核岭回归与多目标粒子群优化算法相结合的方法辅助优化工艺参数选择。构造了工艺参数对应的焊接下限,继而利用基于高斯核函数的核岭回归模型进行拟合;多目标粒子群的每个粒子代表一组工艺参数,通过群体进化与变异、引导者选取与优化、解集维护3种操作,并结合回归模型,有效获取了指定焊接目标下的最优解集。该方法还借鉴K近邻算法思想设计评价标准,以度量每个解的可靠性,进一步筛选更优质的解,保证所选工艺参数有更高的容错性。所提方法解决了电池焊接行业目前面临的问题,具有极其重要的应用价值。
Keyword ：
动力电池 动力电池 多目标粒子群优化 多目标粒子群优化 工艺参数 工艺参数 核岭回归 核岭回归 激光焊接 激光焊接
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| GB/T 7714 | 邓新国 , 王磊 , 陈家瑞 et al. 结合核岭回归与多目标粒子群优化算法的激光焊接工艺参数预测 [J]. | 计算机集成制造系统 , 2021 , 27 (11) : 3131-3137 . |
| MLA | 邓新国 et al. "结合核岭回归与多目标粒子群优化算法的激光焊接工艺参数预测" . | 计算机集成制造系统 27 . 11 (2021) : 3131-3137 . |
| APA | 邓新国 , 王磊 , 陈家瑞 , 徐海威 . 结合核岭回归与多目标粒子群优化算法的激光焊接工艺参数预测 . | 计算机集成制造系统 , 2021 , 27 (11) , 3131-3137 . |
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A parallel simulation that partitions a large circuit into sub-circuits is widely used to reduce simulation rtmtime. To achieve higher simulation throughput, we shall consider signal directions, and thus the final partitioning solution must he acyclic. In this paper, we model a circuit as a directed graph imd consider acyclic graph partitioning to minimize edge cuts. This problem differs from the traditional partitioning problem because of the additional acyclicity constraint. Unlike traditional heuristics that tend to be trapped in local minima, especially for large graphs, we present a novel discrete dynamic filled function algorithm for the acyclic graph partitioning problem. Our algorithm can guarantee convergence and effectively move from one discrete local minimizer to another better one. Experimental results show that our algorithm achieves 8% average cutsize reduction over the state-of-the-art works in a comparable runtime.
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| GB/T 7714 | Chen, Jianli , Chen, Jiarui , Shi, Xiao et al. Late Breaking Results: Novel Discrete Dynamic Filled Function Algorithm for Acyclic Graph Partitioning [C] . 2021 : 1368-1369 . |
| MLA | Chen, Jianli et al. "Late Breaking Results: Novel Discrete Dynamic Filled Function Algorithm for Acyclic Graph Partitioning" . (2021) : 1368-1369 . |
| APA | Chen, Jianli , Chen, Jiarui , Shi, Xiao , Sun, Lichong , Yu, Jun . Late Breaking Results: Novel Discrete Dynamic Filled Function Algorithm for Acyclic Graph Partitioning . (2021) : 1368-1369 . |
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