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学者姓名：陈家瑞
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Abstract ：
针对新工科背景下国产电子设计自动化（EDA）软件人才紧缺和培养难的状况，从教学内容调整、实践教学体系搭建和综合实践项目设置等方面提出“分层递进，产教融合”的模式，设计面向国产EDA人才培养的课程群实践教学体系，阐述如何采用课程群分层递进、一体化贯穿式，使实践教学体系可以有效覆盖各个层次的创新实践能力的培养，最后说明教学效果。
Keyword ：
EDA软件人才 EDA软件人才 创新实践能力 创新实践能力 实践教学体系 实践教学体系
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| GB/T 7714 | 陈家瑞 , 邓新国 , 陈振 . 面向国产EDA软件人才培养的课程群实践教学体系 [J]. | 计算机教育 , 2024 , PageCount-页数: 4 (07) : 174-177 . |
| MLA | 陈家瑞 等. "面向国产EDA软件人才培养的课程群实践教学体系" . | 计算机教育 PageCount-页数: 4 . 07 (2024) : 174-177 . |
| APA | 陈家瑞 , 邓新国 , 陈振 . 面向国产EDA软件人才培养的课程群实践教学体系 . | 计算机教育 , 2024 , PageCount-页数: 4 (07) , 174-177 . |
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Abstract ：
Escape routing is an important part in printed circuit board routing. As the number of pins increases and the scale of pin array expands, the ordered escape routing becomes more and more complex. To solve the problem that the time and quality of ordered escape routing cannot be balanced simultaneously, an ordered escape routing scheme combining heuristic algorithm and improved integer linear programming was proposed. The scheme consisted of two stages: initial solution construction, rip-up and reroute. In the first stage, the longest common subsequence was used to determine the initial wiring sequence of escape pins. Then, the heuristic algorithm of piece-wise cost prediction function is used to pre-route most pins in a short time, and finally to optimize and adjust the circuit. In the second stage, the subgraph range was determined first, then the improved integer linear programming expression was given, and the rip-up and rerouting was carried out based on the initial routing, to improve the routing rate and achieve local optimization. Finally, the shortest path algorithm was used to rip-up and reroute to further enhance the overall routing rate. Experimental results showed that the proposed routing scheme could obtain the optimal or approximate optimal results in a short time, and the CPU time was reduced by 35.57% on average compared with the previous integer linear programming. © 2024 CIMS. All rights reserved.
Keyword ：
heuristic algorithms heuristic algorithms integer linear programming integer linear programming ordered escape routing ordered escape routing rip-up and reroute rip-up and reroute shortest path shortest path
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| GB/T 7714 | Deng, X. , Ye, S. , Chen, J. . Ordered escape routing combining heuristic algorithm and improved integer linear programming; [结合启发式算法与改进整数线性规划的有序逃逸布线] [J]. | Computer Integrated Manufacturing Systems, CIMS , 2024 , 30 (12) : 4302-4313 . |
| MLA | Deng, X. 等. "Ordered escape routing combining heuristic algorithm and improved integer linear programming; [结合启发式算法与改进整数线性规划的有序逃逸布线]" . | Computer Integrated Manufacturing Systems, CIMS 30 . 12 (2024) : 4302-4313 . |
| APA | Deng, X. , Ye, S. , Chen, J. . Ordered escape routing combining heuristic algorithm and improved integer linear programming; [结合启发式算法与改进整数线性规划的有序逃逸布线] . | Computer Integrated Manufacturing Systems, CIMS , 2024 , 30 (12) , 4302-4313 . |
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Abstract ：
Escape routing is a crucial step in printed circuit board (PCB) design. In response to the issues of low wiring efficiency in large-scale pin array circuit board routing where multiple devices synchronization is not considered in the current escape algorithm, this paper proposes a simultaneous escape routing algorithm based on weighted maximum independent set. Firstly, a path conflict graph is constructed by projecting paths correlated to pin pairs, followed by obtaining layered ordering results using the weighted maximum independent set model. Subsequently, channel estimation and channel optimization are performed using depth-first search in different directions. Finally, an escape routing is conducted using a detailed grid-based wiring method. Experimental results demonstrate that the proposed algorithm achieves a near 100% successful routing rate for large-scale pin array PCB cases. It outperforms the minimum cost multi-commodity flow (MMCF) algorithm and the sequential escape algorithm with estimated functions by an average improvement of 10% in wire length.
Keyword ：
Channel planning Channel planning Layered ordering Layered ordering Maximum independent set Maximum independent set Simultaneous escape routing Simultaneous escape routing
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| GB/T 7714 | Yang, Ze , Hu, Kunwei , Liu, Qinghai et al. Simultaneous Escape Routing Algorithm for Large-scale Pin Arrays [J]. | 2024 INTERNATIONAL SYMPOSIUM OF ELECTRONICS DESIGN AUTOMATION, ISEDA 2024 , 2024 : 386-391 . |
| MLA | Yang, Ze et al. "Simultaneous Escape Routing Algorithm for Large-scale Pin Arrays" . | 2024 INTERNATIONAL SYMPOSIUM OF ELECTRONICS DESIGN AUTOMATION, ISEDA 2024 (2024) : 386-391 . |
| APA | Yang, Ze , Hu, Kunwei , Liu, Qinghai , Chen, Jiarui . Simultaneous Escape Routing Algorithm for Large-scale Pin Arrays . | 2024 INTERNATIONAL SYMPOSIUM OF ELECTRONICS DESIGN AUTOMATION, ISEDA 2024 , 2024 , 386-391 . |
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由于不断增长的芯片引脚数量、极高的引脚密度和独特的物理限制，印刷电路板（Printed Circuit Board,PCB）的手动布线已成为一项耗时的任务。近年来，高效率的自动化布线技术得到了广泛的研究。区域布线是PCB设计的一个重要组成部分。针对基于静态网格区域布线的方案，布线拥塞、布通率低等问题，本文提出了一套基于动态网格的135度区域布线算法，主要包括以下技术:（1）对当前布线采用实时扩展动态网格；（2）135度布线角度节点调整算法；（3）基于拥塞控制的改进A~*算法；（4）有效的拆线重布机制。实验结果表明，该算法对于所有工业界布线测试用例布通率都达到100%，并且运行时间方面优于工业布线器Free Routing和Allegro。
Keyword ：
A~*算法 A~*算法 动态网格 动态网格 区域布线 区域布线 拆线重布 拆线重布
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| GB/T 7714 | 陈云梦 , 陈传东 , 陈家瑞 et al. 基于动态网格的135度PCB区域布线算法 [J]. | 中国集成电路 , 2024 , 33 (03) : 19-25,31 . |
| MLA | 陈云梦 et al. "基于动态网格的135度PCB区域布线算法" . | 中国集成电路 33 . 03 (2024) : 19-25,31 . |
| APA | 陈云梦 , 陈传东 , 陈家瑞 , 周宇靖 . 基于动态网格的135度PCB区域布线算法 . | 中国集成电路 , 2024 , 33 (03) , 19-25,31 . |
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Abstract ：
在印刷电路板布线中,逃逸布线是重要的组成部分.随着器件引脚数量不断增加,引脚阵列规模不断扩大,有序逃逸布线问题变得愈发复杂.针对目前有序逃逸布线研究中布线时间与质量无法兼顾的问题,提出一种结合启发式算法与改进整数线性规划的布线方案.该方案分为构建初始解与拆线重布二个阶段.在第一个阶段,先利用最长公共子序列给出逃逸引脚初步布线顺序,接着利用分段代价预估函数的启发式算法,在短时间内对大部分引脚进行预布线.在第二个阶段,首先确定子图范围,然后给出改进的整数线性规划表达式,在初始布线的基础上进行拆线重布,提高布通率的同时达到局部最优.最后再使用最短路径算法进行拆线重布,进一步提高总体布通率.实验结果表明,提出的布线方案能够在较短的时间内得到最优或近似最优的布线结果,相较于使用整数线性规划方案来进行布线,CPU时间平均减少35.57％.
Keyword ：
启发式算法 启发式算法 拆线重布 拆线重布 整数线性规划 整数线性规划 最短路径 最短路径 有序逃逸布线 有序逃逸布线
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| GB/T 7714 | 邓新国 , 叶似锦 , 陈家瑞 . 结合启发式算法与改进整数线性规划的有序逃逸布线 [J]. | 计算机集成制造系统 , 2024 , 30 (12) : 4302-4313 . |
| MLA | 邓新国 et al. "结合启发式算法与改进整数线性规划的有序逃逸布线" . | 计算机集成制造系统 30 . 12 (2024) : 4302-4313 . |
| APA | 邓新国 , 叶似锦 , 陈家瑞 . 结合启发式算法与改进整数线性规划的有序逃逸布线 . | 计算机集成制造系统 , 2024 , 30 (12) , 4302-4313 . |
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In modern very large-scale integration (VLSI) design, the solution quality of the bus routing is a crucial factor that determines the timing and power of circuit, and finally affects the performance and yield of chips. Taking bus deviation as the main optimization objective, an effective multi-strategy bus deviation-driven layer assignment algorithm is proposed to solve the timing-matching problem of bus routing. First, a net priority determination method that integrates multiple features is presented to determine the layer assignment order, thus obtaining a routing sequence which can weigh the wirelength and bus deviation well. Second, an effective single net layer assignment algorithm is proposed to assign each net based on dynamic programming, thus reducing the number of vias. Third, a layer shifting strategy based on the bus lookup table is designed to effectively balance total wirelength and bus deviation by sacrificing a certain number of vias. Experimental results, compared to existing work, show that the proposed algorithm can achieve significant optimization on the bus deviation and total wirelength, and finally obtain the best results in terms of the bus deviation, which is the most important optimization objective for bus routing.
Keyword ：
bus deviation bus deviation bus lookup table bus lookup table layer assignment layer assignment layer shifting layer shifting VLSI VLSI
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| GB/T 7714 | Yu, Yantao , Li, Zepeng , Chen, Jiarui et al. Multi-Strategy Bus Deviation-Driven Layer Assignment Algorithm [J]. | 2024 INTERNATIONAL SYMPOSIUM OF ELECTRONICS DESIGN AUTOMATION, ISEDA 2024 , 2024 : 456-461 . |
| MLA | Yu, Yantao et al. "Multi-Strategy Bus Deviation-Driven Layer Assignment Algorithm" . | 2024 INTERNATIONAL SYMPOSIUM OF ELECTRONICS DESIGN AUTOMATION, ISEDA 2024 (2024) : 456-461 . |
| APA | Yu, Yantao , Li, Zepeng , Chen, Jiarui , Huang, Xing , Liu, Genggeng , Xu, Ning . Multi-Strategy Bus Deviation-Driven Layer Assignment Algorithm . | 2024 INTERNATIONAL SYMPOSIUM OF ELECTRONICS DESIGN AUTOMATION, ISEDA 2024 , 2024 , 456-461 . |
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Abstract ：
Legalized routing is an essential part of PCB automatic routing. It solves the problem of wiring conflicts and obtains routing results that comply with the constraints of design rules. Traditional legalized routing problems mostly use trial backtracking methods, but with increasing design complexity and design rules, avoiding wiring conflicts between networks has become increasingly challenging. This paper proposes a legalized routing algorithm based on linear programming to obtain the optimal wiring trajectory under specified topological constraints. First, the corresponding routing model was established based on numerous routing rules, and a routing grid diagram was found using obstacles as grid points. Secondly, a global routing algorithm was used to obtain the estimated wiring path, and integer linear programming was used to realize the mathematical modeling of the legalized routing problem. Finally, a multi-line simultaneous routing strategy was used to design and implement a detailed routing algorithm, optimizing the routing results. We use C++ to complete the coding work and thoroughly test the PCB use cases of different sizes. The experimental results show that our algorithm still maintains a 100% routing success rate, good time performance, and excellent routing quality with large-scale use cases compared with the trial backtracking method.
Keyword ：
detailed algorithm detailed algorithm escape routing escape routing integer linear programming integer linear programming printed circuit board printed circuit board
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| GB/T 7714 | Chen, Chuandong , Tong, Xin , Liu, Qinghai et al. Legalized Routing Algorithm Based on Linear Programming [J]. | ELECTRONICS , 2023 , 12 (20) . |
| MLA | Chen, Chuandong et al. "Legalized Routing Algorithm Based on Linear Programming" . | ELECTRONICS 12 . 20 (2023) . |
| APA | Chen, Chuandong , Tong, Xin , Liu, Qinghai , Chen, Jiarui , Lin, Zhifeng . Legalized Routing Algorithm Based on Linear Programming . | ELECTRONICS , 2023 , 12 (20) . |
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Global routing plays a crucial role in printed circuit board (PCB) design and affects the cost of the design significantly. Conventional methods based on rectangular grids have some limitations, whereas this paper introduces a new algorithm that employs a triangular grid model, which offers a more efficient solution to the problem. Firstly, we present a technique to sort all unconnected two-pin nets. Next, a triangular grid graph is constructed to represent the routing resources on the printed circuit board. Finally, we use the concept of maximum flow to identify the paths for global routing and apply detailed routing for the completion of wires. Results from experiments demonstrate that our algorithm is faster than two state-of-the-art routers and does not have any design rule violations for all industrial PCB instances.
Keyword ：
global routing global routing maximum flow maximum flow triangular grid triangular grid
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| GB/T 7714 | Chen, Jiarui , Zhou, Yujing , Liu, Qinghai et al. A Novel Global Routing Algorithm for Printed Circuit Boards Based on Triangular Grid [J]. | ELECTRONICS , 2023 , 12 (24) . |
| MLA | Chen, Jiarui et al. "A Novel Global Routing Algorithm for Printed Circuit Boards Based on Triangular Grid" . | ELECTRONICS 12 . 24 (2023) . |
| APA | Chen, Jiarui , Zhou, Yujing , Liu, Qinghai , Zhang, Xinhong . A Novel Global Routing Algorithm for Printed Circuit Boards Based on Triangular Grid . | ELECTRONICS , 2023 , 12 (24) . |
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PCB routing becomes time-consuming as the complexity of PCB design increases. Unlike traditional schemes that treat the two essential PCB routing processes separately, namely, escape and bus routing, we consider the continuity between them and present a golden-pin-based routing scheme to find the desired solution with angle and topology constraints. Further, conventional rip-up and reroute methods are often ineffective and inefficient for congestion alleviation and routability optimization. We construct a component graph by modeling components as vertices and applying the minimum weight vertex covering method to improve the routability. A self-adaptable ordering method is presented for escape routing to arrange the pin order on the component boundary, guaranteeing successful bus routing. In addition, escape routing is performed based on a disjoint path method. We construct a dynamic Hanan grid in bus routing and utilize a novel congestion adjustment technique to improve solution quality. Compared with FreeRouting and Allegro, the experiment results show that our algorithm achieves high routability and a significant 90% runtime reduction.
Keyword ：
bus routing bus routing disjoint path disjoint path escape routing escape routing
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| GB/T 7714 | Liu, Qinghai , Tang, Qinfei , Chen, Jiarui et al. Disjoint-Path and Golden-Pin Based Irregular PCB Routing with Complex Constraints [J]. | IEEE DESIGN AUTOMATION CONFERENCE, DAC , 2023 . |
| MLA | Liu, Qinghai et al. "Disjoint-Path and Golden-Pin Based Irregular PCB Routing with Complex Constraints" . | IEEE DESIGN AUTOMATION CONFERENCE, DAC (2023) . |
| APA | Liu, Qinghai , Tang, Qinfei , Chen, Jiarui , Chen, Chuandong , Zhu, Ziran , He, Huan et al. Disjoint-Path and Golden-Pin Based Irregular PCB Routing with Complex Constraints . | IEEE DESIGN AUTOMATION CONFERENCE, DAC , 2023 . |
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Global routing is a critical problem in PCB routing, and its quality greatly affect the PCB design cost. Unlike existing methods based on traditional rectangular grid, this paper present a novel algorithm based on triangular grid model to handle the problem. We first propose a method to sort all the unconnected two-pin nets, then construct a triangular grid graph to represent the routing resources on the printed circuited board. Finally we use the idea of maximum flow to find the paths to complete global routing and use the detailed routing to get the result of completed wires. Experimental results show that our algorithm can spend less time than the two state-of-the-art routers without any design rule violations for all given industrial PCB instances. © 2023 IEEE.
Keyword ：
Printed circuit boards Printed circuit boards Printed circuit design Printed circuit design Routing algorithms Routing algorithms
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| GB/T 7714 | Zhou, Yujing , Liu, Qinghai , Zhang, Xinhong et al. A Global Routing Algorithm for PCB Based on Triangular Grid [C] . 2023 : 64-69 . |
| MLA | Zhou, Yujing et al. "A Global Routing Algorithm for PCB Based on Triangular Grid" . (2023) : 64-69 . |
| APA | Zhou, Yujing , Liu, Qinghai , Zhang, Xinhong , Chen, Jiarui . A Global Routing Algorithm for PCB Based on Triangular Grid . (2023) : 64-69 . |
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