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< Page ,Total 18 >
基于深度强化学习的连续微流控生物芯片控制逻辑布线
期刊论文 | 2025 , 62 (4) , 950-962 | 计算机研究与发展
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Abstract :

随着电子设计自动化技术的迅速发展,连续微流控生物芯片成为了目前最具前景的生化实验平台之一.该芯片通过采用内部的微阀门以及微通道来操纵体积仅为毫升或纳升的流体样品,从而自动执行混合和检测等基本的生化实验操作.为了实现正确的生化测定功能,部署于芯片内部的微阀门通常需要由基于多路复用器的控制逻辑进行管控,其通过控制通道获得来自核心输入的控制信号以实现精确切换.由于生化反应通常需要非常高的灵敏度,因此为了保证信号的即时传输,需要尽可能地减少连接每个阀门的控制路径长度,以降低信号传输的时延.此外,为了降低芯片的制造成本,如何有效减少控制逻辑中通道的总长度也是逻辑架构设计需要解决的关键问题之一.针对上述问题,提出了一种基于深度强化学习的控制逻辑布线算法以最小化信号传输时延以及控制通道总长度,从而自动构建高效的控制通道网络.该算法采用竞争深度Q网络架构作为深度强化学习框架的智能体,从而对信号传输时延和通道总长度进行权衡评估.此外,针对控制逻辑首次实现了对角型的通道布线,从根本上提高了阀门切换操作的效率并降低了芯片的制造成本.实验结果表明,所提出的算法能够有效构建高性能、低成本的控制逻辑架构.

Keyword :

对角通道布线 对角通道布线 控制通道网络 控制通道网络 控制逻辑 控制逻辑 深度强化学习 深度强化学习 连续微流控生物芯片 连续微流控生物芯片

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GB/T 7714 蔡华洋 , 黄兴 , 刘耿耿 . 基于深度强化学习的连续微流控生物芯片控制逻辑布线 [J]. | 计算机研究与发展 , 2025 , 62 (4) : 950-962 .
MLA 蔡华洋 等. "基于深度强化学习的连续微流控生物芯片控制逻辑布线" . | 计算机研究与发展 62 . 4 (2025) : 950-962 .
APA 蔡华洋 , 黄兴 , 刘耿耿 . 基于深度强化学习的连续微流控生物芯片控制逻辑布线 . | 计算机研究与发展 , 2025 , 62 (4) , 950-962 .
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基于深度强化学习的连续微流控生物芯片控制逻辑布线
期刊论文 | 2025 , 62 (4) , 950-962 | 计算机研究与发展
流路径驱动的微流控生物芯片任意角度布线算法
期刊论文 | 2025 , 62 (4) , 978-988 | 计算机研究与发展
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Abstract :

连续微流控生物芯片(continuous-flow microfluidic biochips,CFMBs)由于其能够自动高效地执行生化应用,成为近年来的研究热点.PathDriver+将实际的流体运输需求考虑进CFMBs设计流程中,并实现了实际的流体运输和去除,并为每个运输任务规划独立的流路径,而这些问题在之前的工作中被忽略了.但是,由于PathDriver+仅考虑了网格模型下总体布线的线长优化,而未考虑详细布线,没有充分利用CFMBs布线的灵活性.此外,PathDriver+仅考虑X型布线方式,而任意角度布线能够更有效地利用布线资源,从而缩短流通道长度.针对上述问题,提出了流路径驱动的任意角度布线算法,在考虑实际的流体运输需求的同时,提高布线资源的利用率,减少流通道的长度.首先基于Delaunay三角剖分构建搜索图,从而在保证布线质量的同时,提高布线解的搜索效率.然后,在构建的搜索图上,使用基于Dijkstra的流路径布线方法,以快速生成具有较短线长的布线结果.在布线过程中针对流通道复用和流通道交叉点数量优化问题,分别提出了通道复用策略和交叉优化策略,以进一步提高布线结果的质量.实验结果表明,与最新工作PathDriver+相比,所提算法在布线总线长、流层端口使用数量、通道交叉点数量方面分别降低了33.21%,11.04%,44.79%,通道复用率平均提高了 26.88个百分点,交叉点处引入阀门的总数量平均减少了42.01%,这表明所提算法的有效性和优越性.

Keyword :

任意角度布线 任意角度布线 流路径规划 流路径规划 物理设计 物理设计 计算机辅助设计 计算机辅助设计 连续微流控生物芯片 连续微流控生物芯片

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GB/T 7714 潘友林 , 郭帅 , 黄兴 et al. 流路径驱动的微流控生物芯片任意角度布线算法 [J]. | 计算机研究与发展 , 2025 , 62 (4) : 978-988 .
MLA 潘友林 et al. "流路径驱动的微流控生物芯片任意角度布线算法" . | 计算机研究与发展 62 . 4 (2025) : 978-988 .
APA 潘友林 , 郭帅 , 黄兴 , 刘耿耿 . 流路径驱动的微流控生物芯片任意角度布线算法 . | 计算机研究与发展 , 2025 , 62 (4) , 978-988 .
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流路径驱动的微流控生物芯片任意角度布线算法
期刊论文 | 2025 , 62 (4) , 978-988 | 计算机研究与发展
A Robust Multilayer X-Architecture Global Routing System Based on Particle Swarm Optimization Scopus
期刊论文 | 2024 , 54 (9) , 1-14 | IEEE Transactions on Systems, Man, and Cybernetics: Systems
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Abstract :

Global routing is an extremely important stage of very large scale integration (VLSI) physical design. With the rise of nano-scale integrated circuit design, the multilayer global routing problem has attracted considerable research interest during the past few years. In this article, a multilayer X-architecture global routing (ML-XGR) system based on particle swarm optimization (PSO), called FZU-Router, is proposed to solve the ML-XGR problem for the first time. FZU-Router contains a multilayer X-architecture integer linear programming (MX-ILP) model and a multilayer X-architecture PSO (MX-PSO) algorithm, which are presented to formulate and solve the ML-XGR problem, respectively. Moreover, four effective strategies are designed to enhance the efficiency of FZU-Router: 1) a strategy for generating new routing modes is proposed to strengthen the robustness of encoding strategy of MX-PSO; 2) a strategy for combining MX-PSO with maze routing is proposed to improve the routability; 3) a strategy for reducing the channel capacity is proposed to make better use of optimization ability of MX-PSO; and 4) a strategy for dynamic resource assignment is proposed to make better use of routing resources and shorten the running time. Experimental results on multiple benchmarks confirm that the proposed FZU-Router leads to fewer total overflow and shorter total wirelength compared with the state-of-the-art routers. IEEE

Keyword :

Global routing Global routing integer linear programming (ILP) integer linear programming (ILP) Integrated circuit interconnections Integrated circuit interconnections multilayer routing multilayer routing Nonhomogeneous media Nonhomogeneous media Optimization Optimization particle swarm optimization (PSO) particle swarm optimization (PSO) Partitioning algorithms Partitioning algorithms Routing Routing Very large scale integration Very large scale integration very large scale integration (VLSI) very large scale integration (VLSI) Wire Wire X-architecture X-architecture

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GB/T 7714 Liu, G. , Zhu, Y. , Zhuang, Z. et al. A Robust Multilayer X-Architecture Global Routing System Based on Particle Swarm Optimization [J]. | IEEE Transactions on Systems, Man, and Cybernetics: Systems , 2024 , 54 (9) : 1-14 .
MLA Liu, G. et al. "A Robust Multilayer X-Architecture Global Routing System Based on Particle Swarm Optimization" . | IEEE Transactions on Systems, Man, and Cybernetics: Systems 54 . 9 (2024) : 1-14 .
APA Liu, G. , Zhu, Y. , Zhuang, Z. , Pei, Z. , Gan, M. , Huang, X. et al. A Robust Multilayer X-Architecture Global Routing System Based on Particle Swarm Optimization . | IEEE Transactions on Systems, Man, and Cybernetics: Systems , 2024 , 54 (9) , 1-14 .
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NR-Router+: Enhanced Non-Regular Electrode Routing With Optimal Pin Selection for Electrowetting-on-Dielectric Chips Scopus
期刊论文 | 2024 , 43 (9) , 1-1 | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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With the advances in microfluidics, electrowettingon-dielectric (EWOD) chips have widely been applied to various biological and chemical laboratory protocols. Glass-based EWOD chips with non-regular electrodes are proposed, which allow more reliable droplet operations and facilitate the integration of optical sensors for many biochemical applications. Furthermore, non-regular electrode designs are utilized in EWOD chips, e.g., interdigitated electrodes for more reliable droplet manipulation, custom shaped electrodes for specific applications like concentric heating, etc. However, due to the technical challenges of fabricating multi-layer interconnection on the glass substrate, e.g., unreliable process and high cost, both control electrodes and wires are fabricated with a single-layer configuration, which poses significant challenges to pin selection for non-regular electrodes. In this paper, we propose a minimum-cost flow-based routing algorithm called NR-Router+ that features efficient and robust routing for single-layer EWOD chips with non-regular electrodes. To the best of our knowledge, this is the first work that overcomes the aforementioned challenges. We construct a minimum-cost flow algorithm to generate optimal routing paths followed by a light-weight model to handle flow capacity. A grid reduction strategy is proposed to reduce the computational overhead. Additionally, a flow collocation algorithm based on integer linear programming is presented to efficiently prevent wire overlapping. Experimental results show that NR-Router+ achieves 100% routability while minimizing wirelength with shorter run time. Moreover, NR-Router+ can generate mask files feasible for manufacturing via adjustments of design parameters, thus demonstrating its robustness and efficiency. IEEE

Keyword :

Costs Costs Electrodes Electrodes Pins Pins Routing Routing Shape Shape Substrates Substrates Wires Wires

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GB/T 7714 Pan, Y. , Liu, G. , Huang, X. et al. NR-Router+: Enhanced Non-Regular Electrode Routing With Optimal Pin Selection for Electrowetting-on-Dielectric Chips [J]. | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems , 2024 , 43 (9) : 1-1 .
MLA Pan, Y. et al. "NR-Router+: Enhanced Non-Regular Electrode Routing With Optimal Pin Selection for Electrowetting-on-Dielectric Chips" . | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 43 . 9 (2024) : 1-1 .
APA Pan, Y. , Liu, G. , Huang, X. , Li, Z. , Huang, H. , Liang, C. et al. NR-Router+: Enhanced Non-Regular Electrode Routing With Optimal Pin Selection for Electrowetting-on-Dielectric Chips . | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems , 2024 , 43 (9) , 1-1 .
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LightCapsGNN: light capsule graph neural network for graph classification Scopus
期刊论文 | 2024 , 66 (10) , 6363-6386 | Knowledge and Information Systems
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Graph neural networks (GNNs) have achieved excellent performances in many graph-related tasks. However, they need appropriate pooling operations to deal with the graph classification tasks, and thus, they may suffer from some limitations such as information loss and ignorance of the part-whole relationships. CapsGNN is proposed to solve the above-mentioned issues, but suffers from high time and space complexities leading to its poor scalability. In this paper, we propose a novel, effective and efficient graph capsule network called LightCapsGNN. First, we devise a fast voting mechanism (called LightVoting) implemented via linear combinations of K shared transformation matrices to reduce the number of trainable parameters in the voting procedure. Second, an improved reconstruction layer is proposed to encourage our model to capture more informative and essential knowledge of the input graph. Third, other improvements are combined to further accelerate our model, e.g., matrix capsules and a trainable routing mechanism. Finally, extensive experiments are conducted on the popular real-world graph benchmarks in the graph classification tasks and the proposed model can achieve competitive or even better performance compared to ten baselines or state-of-the-art models. Furthermore, compared to other CapsGNNs, the proposed model reduce almost 99% learnable parameters and 31.1% running time. © The Author(s), under exclusive licence to Springer-Verlag London Ltd., part of Springer Nature 2024.

Keyword :

Capsule networks Capsule networks Graph neural networks Graph neural networks Routing Routing

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GB/T 7714 Yan, Y. , Li, J. , Xu, S. et al. LightCapsGNN: light capsule graph neural network for graph classification [J]. | Knowledge and Information Systems , 2024 , 66 (10) : 6363-6386 .
MLA Yan, Y. et al. "LightCapsGNN: light capsule graph neural network for graph classification" . | Knowledge and Information Systems 66 . 10 (2024) : 6363-6386 .
APA Yan, Y. , Li, J. , Xu, S. , Chen, X. , Liu, G. , Fu, Y.-G. . LightCapsGNN: light capsule graph neural network for graph classification . | Knowledge and Information Systems , 2024 , 66 (10) , 6363-6386 .
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Physical design for microfluidic biochips considering actual volume management and channel storage EI
期刊论文 | 2024 , 98 | Integration
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In recent years, microfluidic biochips have been widely applied in various fields of human society. The optimization design of system-architecture based on continuous-flow microfluidic biochips has been widely studied. However, most previous work was based on the traditional chip architecture with dedicated storage, which not only limits the performance of biochips but also increases their manufacturing costs. In order to improve the execution efficiency and reduce the manufacturing cost, a distributed channel-storage architecture can be used to temporarily cache intermediate fluids in idle flow channels. Under this architecture, careful consideration of the volume management of the fluid to be cached is a prerequisite for ensuring the reliability of bioassay results. However, the existing work has not considered the volume management of the fluid to be cached in detail. This may cause the volume of the fluid to not match the capacity of the storage channel, which can contaminate other fluids and lead to incorrect bioassay results or increase the manufacturing cost of biochips due to long storage channels. In this paper, we propose a physical design method for microfluidic biochips that considers the actual volume of fluid while utilizing distributed channel storage. We address this problem by taking a placement and routing co-design strategy throughout the iterative process of the simulated annealing algorithm. Experimental results under multiple benchmarks show that the proposed method can effectively reduce the completion time of bioassays, minimize the flow path length, and decrease the number of intersections. © 2024

Keyword :

Biochips Biochips Design Design Fluidic devices Fluidic devices Iterative methods Iterative methods Microfluidics Microfluidics Simulated annealing Simulated annealing

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GB/T 7714 Liu, Genggeng , Chen, Zhengyang , Chen, Zhisheng et al. Physical design for microfluidic biochips considering actual volume management and channel storage [J]. | Integration , 2024 , 98 .
MLA Liu, Genggeng et al. "Physical design for microfluidic biochips considering actual volume management and channel storage" . | Integration 98 (2024) .
APA Liu, Genggeng , Chen, Zhengyang , Chen, Zhisheng , Liu, Bowen , Zhang, Yu , Huang, Xing . Physical design for microfluidic biochips considering actual volume management and channel storage . | Integration , 2024 , 98 .
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Timing-Driven High-Level Synthesis for Continuous-Flow Microfluidic Biochips CPCI-S
期刊论文 | 2024 | 2024 25TH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN, ISQED 2024
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Abstract :

As continuous-flow microfluidic biochips technology rapidly advances, its automated synthesis methods require adapting to increasingly complex and stringent biochemical applications. In particular, with the introduction of time-sensitive bioassays, in this work, we present a timing-driven high-level synthesis method to optimize the resource efficiency of bioassays considering the time constraints. Specifically, we investigate the existing forms of time constraints and propose a corresponding flexible modeling approach based on reaction-control which can achieve downward compatibility for physical design. Additionally, we also analyze the impact of storage and wash on time constraints. The experimental results show that our method achieves efficient execution and low devices cost while satisfying time constraints.

Keyword :

continuous-flow microfluidic biochips continuous-flow microfluidic biochips high-level synthesis high-level synthesis time constraints time constraints

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GB/T 7714 Ye, Zhengyang , Chen, Zhisheng , Pan, Youlin et al. Timing-Driven High-Level Synthesis for Continuous-Flow Microfluidic Biochips [J]. | 2024 25TH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN, ISQED 2024 , 2024 .
MLA Ye, Zhengyang et al. "Timing-Driven High-Level Synthesis for Continuous-Flow Microfluidic Biochips" . | 2024 25TH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN, ISQED 2024 (2024) .
APA Ye, Zhengyang , Chen, Zhisheng , Pan, Youlin , Liu, Genggeng , Guo, Wenzhong , Ho, Tsung-Yi et al. Timing-Driven High-Level Synthesis for Continuous-Flow Microfluidic Biochips . | 2024 25TH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN, ISQED 2024 , 2024 .
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Timing-Driven High-Level Synthesis for Continuous-Flow Microfluidic Biochips Scopus
其他 | 2024 | Proceedings - International Symposium on Quality Electronic Design, ISQED
Timing-Driven High-Level Synthesis for Continuous-Flow Microfluidic Biochips EI
会议论文 | 2024
基于动态粒子群优化的X结构Steiner最小树算法
期刊论文 | 2024 , 50 (9) , 226-234 | 计算机工程
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Abstract :

Steiner最小树(SMT)是总体布线的最佳连接模型,其构造是1个NP-难问题.粒子群优化(PSO)算法在解决NP-难问题中具有良好的表现,而PSO算法中种群的拓扑结构及搜索信息的传递机制对其性能有着很大的影响.1个适用于具体问题的种群拓扑结构对算法性能的提升极为显著.因此,利用PSO求解总体布线问题需要根据具体布线问题的特性来选择合适的粒子拓扑结构策略,以提升PSO的性能.提出基于动态PSO的X结构Steiner最小树(XSMT)算法以解决总体布线问题.首先,设计动态子群与信息交换策略,对种群进行子群划分,引入信息交换的概念,让子群在保持独立性的同时与其他子群进行信息交换,增加子群多样性;其次,设计粒子学习与变异策略,通过设置子群中粒子的学习对象使子群趋向于全局最优,并选择每个子群中适应度值最好的粒子进行变异,使粒子更易于跳出局部最优;最后,设计从多群局部学习过渡到单群全局学习策略,使算法在迭代次数到达阈值之后从局部学习过渡到全局学习,使得粒子在较优拓扑结构的基础上内部连接以获得更好的线长优化率.实验结果表明,与现有的2种R结构SMT(RSMT)算法相比,所提算法在优化线长方面分别优化了10.25%、8.24%;与现有的3种XSMT算法相比,该算法在优化线长方面分别优化了 2.44%、1.46%、0.48%,验证了算法的有效性.

Keyword :

X结构Steiner最小树 X结构Steiner最小树 信息交换 信息交换 动态粒子群优化 动态粒子群优化 粒子群优化离散化 粒子群优化离散化 超大规模集成电路布线 超大规模集成电路布线

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GB/T 7714 王景熠 , 朱予涵 , 周茹平 et al. 基于动态粒子群优化的X结构Steiner最小树算法 [J]. | 计算机工程 , 2024 , 50 (9) : 226-234 .
MLA 王景熠 et al. "基于动态粒子群优化的X结构Steiner最小树算法" . | 计算机工程 50 . 9 (2024) : 226-234 .
APA 王景熠 , 朱予涵 , 周茹平 , 刘耿耿 . 基于动态粒子群优化的X结构Steiner最小树算法 . | 计算机工程 , 2024 , 50 (9) , 226-234 .
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Delay-Driven Layer Assignment Algorithm Based on Integrating Multi-Strategy for Advanced Technology Nodes EI CSCD PKU
期刊论文 | 2024 , 36 (4) , 625-635 | Journal of Computer-Aided Design and Computer Graphics
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Abstract :

By introducing layer assignment algorithm, it can effectively optimize multiple important indicators such as delay and via counts in physical design, and then improve the chip performance. Therefore, a delay optimization layer assignment algorithm integrating multiple strategies is proposed, which considers both non-default-rule wire and coupling effect. First, aiming at the problem that the difference of nets is not carefully considered in the previous work, the differentiated net strategy is proposed. Second, in order to solve the problem of unreasonable evaluation of grid edge congestion in previous work, the segment classifying strategy is proposed. Third, aiming at the problem that the existing work pays more attention to consider congestion constraint when reassigning illegal nets, which leads to high delay of routing results, an effective reassignment and adjustment strategy is proposed. Finally, aiming at the problem of unreasonable routing order in the previous work, a variety of novel methods to determine the routing order are designed, and then a multi-objective driven sorting strategy is proposed. The algorithm runs in the Linux environment with a 2.60 GHz CPU and 64 GB of RAM. The validation experiments use the DAC12 circuit, and the experimental results show that the proposed algorithm can effectively optimize both delay and via counts without overflow. © 2024 Institute of Computing Technology. All rights reserved.

Keyword :

Computer operating systems Computer operating systems Delay circuits Delay circuits

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GB/T 7714 Liu, Genggeng , Jiang, Lieqiu , Li, Zepeng et al. Delay-Driven Layer Assignment Algorithm Based on Integrating Multi-Strategy for Advanced Technology Nodes [J]. | Journal of Computer-Aided Design and Computer Graphics , 2024 , 36 (4) : 625-635 .
MLA Liu, Genggeng et al. "Delay-Driven Layer Assignment Algorithm Based on Integrating Multi-Strategy for Advanced Technology Nodes" . | Journal of Computer-Aided Design and Computer Graphics 36 . 4 (2024) : 625-635 .
APA Liu, Genggeng , Jiang, Lieqiu , Li, Zepeng , Wu, Ruoxin , Xu, Ning . Delay-Driven Layer Assignment Algorithm Based on Integrating Multi-Strategy for Advanced Technology Nodes . | Journal of Computer-Aided Design and Computer Graphics , 2024 , 36 (4) , 625-635 .
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Delay-Driven Layer Assignment Algorithm Based on Integrating Multi-Strategy for Advanced Technology Nodes; [先进制程下基于多策略融合的时延优化层分配算法] Scopus CSCD PKU
期刊论文 | 2024 , 36 (4) , 625-635 | Journal of Computer-Aided Design and Computer Graphics
High Quality Global Routing Algorithm Based on Multi-Stage Optimization EI CSCD PKU
期刊论文 | 2024 , 36 (4) , 607-614 | Journal of Computer-Aided Design and Computer Graphics
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Abstract :

Global routing is a crucial step in VLSI physical design. To address the problems that the low utilization rate of capacity and easy to fall into local optimum in the existing global routing algorithms, a high-quality global routing algorithm based on multi-stage optimization is proposed. First, the virtual capacity dynamic adjustment strategy is introduced in the pre-connection stage and the routing reorganization stage to improve the utilization rate of capacity. Then, in the routing reorganization stage, the routing subarea adaptive expansion strategy is proposed to narrow the search space and improve the routing efficiency. Finally, the A* algorithm heuristic search is combined with the global search capability of the particle swarm algorithm to avoid the algorithm to choose the shortest path in the routing process, and thus avoid the algorithm to fall into the local optimum. Experimental results comparing with existing global routing algorithms on ISPD benchmark circuits show that the routing results of proposed algorithm reduce the wirelength by 6.0% to 22.8%. © 2024 Institute of Computing Technology. All rights reserved.

Keyword :

Heuristic algorithms Heuristic algorithms Optimization Optimization Routing algorithms Routing algorithms VLSI circuits VLSI circuits

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GB/T 7714 Genggeng, Liu , Zhenyu, Pei , Ning, Xu . High Quality Global Routing Algorithm Based on Multi-Stage Optimization [J]. | Journal of Computer-Aided Design and Computer Graphics , 2024 , 36 (4) : 607-614 .
MLA Genggeng, Liu et al. "High Quality Global Routing Algorithm Based on Multi-Stage Optimization" . | Journal of Computer-Aided Design and Computer Graphics 36 . 4 (2024) : 607-614 .
APA Genggeng, Liu , Zhenyu, Pei , Ning, Xu . High Quality Global Routing Algorithm Based on Multi-Stage Optimization . | Journal of Computer-Aided Design and Computer Graphics , 2024 , 36 (4) , 607-614 .
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High Quality Global Routing Algorithm Based on Multi-Stage Optimization; [基于多阶段优化的高质量总体布线算法] Scopus CSCD PKU
期刊论文 | 2024 , 36 (4) , 607-614 | Journal of Computer-Aided Design and Computer Graphics
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