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学者姓名：孙捷
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以超高密度Cu/Sn微凸点和Cu/SnAg微凸点为研究对象,采用COMSOL软件建立仿真模型,研究了不同焊料凸点高度对键合可靠性的影响;采用电镀法制备Cu/Sn凸点阵列和Cu/SnAg凸点阵列,重点对界面处金属间化合物(Intermetallic compounds,IMC)进行研究.结果表明,Cu/SnAg凸点高度的增加有利于降低凸点键合界面应力,从而提高芯片键合可靠性.金属凸点尺寸越小,界面处金属间化合物生长越快,空洞数量越多.雾锡凸点的晶粒尺寸大于亮锡凸点,而且晶界数量较少,使得凸点界面上IMC的生长速度较慢.因此,雾锡凸点能够有效减少凸点界面空洞的形成,SnAg合金替代纯锡材料可以进一步减少凸点界面空洞的形成.通过优化工艺条件,成功制备出点间距为8 μm,像素阵列为1 920×1 080的超高密度Cu/SnAg金属凸点.
Keyword ：
Cu/SnAg凸点 Cu/SnAg凸点 Cu/Sn凸点 Cu/Sn凸点 电镀 电镀 金属间化合物 金属间化合物
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| GB/T 7714 | 罗灿琳 , 林畅 , 曾煌杰 et al. 电镀法制备超高密度Cu/Sn凸点和Cu/SnAg凸点及其微观形貌研究 [J]. | 光电子技术 , 2025 , 45 (1) : 10-17 . |
| MLA | 罗灿琳 et al. "电镀法制备超高密度Cu/Sn凸点和Cu/SnAg凸点及其微观形貌研究" . | 光电子技术 45 . 1 (2025) : 10-17 . |
| APA | 罗灿琳 , 林畅 , 曾煌杰 , 张永爱 , 孙捷 , 严群 et al. 电镀法制备超高密度Cu/Sn凸点和Cu/SnAg凸点及其微观形貌研究 . | 光电子技术 , 2025 , 45 (1) , 10-17 . |
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Mechanical exfoliation of thin sheets remains a prevalent technique for acquiring high-quality two-dimensional (2D) materials, as the chemical vapor deposition (CVD) technique for 2D transition metal dichalcogenides (TMDs) compounds lacks unambiguous theoretical guidance, complicating the precise control of material growth and the synthesis of the desired area and mass. In this paper, we establish the theoretical foundation of the vapor-liquid-solid (VLS) in CVD method growth of TMDs, i.e., the flux model, supported by theoretical analysis and experimental data. Utilizing this theoretical insight, this study proposes a nonvolatile molten salt flux-dominated VLS growth strategy. The introduction of potassium trimolybdate (K2Mo3O10) as a stable molten salt medium enabled the cross-system controlled synthesis of molybdenum-based compounds (MoS2, MoSe2, MoO2, Mo3Te4) by overcoming the reliance of the traditional VLS approach on volatile precursors. The low volatility of this molten salt flux and the synergistic diffusion effect of alkali metals markedly reduced nucleation density and facilitated the targeted lateral growth of atoms, resulting in the successful preparation of millimeter-sized single crystals (maximum size of 918 mu m) and centimeter-sized continuous films. The MoS2 films from this demonstrate exceptional electrical performance (mobility 21.74 cm2 V-1 s-1, switching ratio similar to 105) in back-gated field-effect transistors with enhanced process compatibility. This study introduces a novel approach for the controllable synthesis of 2D semiconductors using molten salt flux engineering, with its cross-material applicability and centimeter-scale production capabilities establishing a basis for the sustainable manufacturing of wafer-scale electronic devices.
Keyword ：
high quality high quality large size large size molten salt assisted CVD molten salt assisted CVD molybdenum disulfide molybdenum disulfide nonvolatile flux nonvolatile flux nucleation kinetics nucleation kinetics
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| GB/T 7714 | Yan, Caihong , Deng, Liying , Xu, Shike et al. A Flux Model-Driven Transverse-Oriented Growth Strategy for the Synthesis of Large-Area Two-Dimensional Molybdenum-Based Materials [J]. | ACS SUSTAINABLE CHEMISTRY & ENGINEERING , 2025 , 13 (23) : 8567-8579 . |
| MLA | Yan, Caihong et al. "A Flux Model-Driven Transverse-Oriented Growth Strategy for the Synthesis of Large-Area Two-Dimensional Molybdenum-Based Materials" . | ACS SUSTAINABLE CHEMISTRY & ENGINEERING 13 . 23 (2025) : 8567-8579 . |
| APA | Yan, Caihong , Deng, Liying , Xu, Shike , Li, Yang , Jiang, Weiwei , Zhou, Yijian et al. A Flux Model-Driven Transverse-Oriented Growth Strategy for the Synthesis of Large-Area Two-Dimensional Molybdenum-Based Materials . | ACS SUSTAINABLE CHEMISTRY & ENGINEERING , 2025 , 13 (23) , 8567-8579 . |
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The fabrication of uniform metal bump arrays with submicron-sized diameters is crucial for achieving Micro-LED displays with ultra-high pixel density. This study presents a fabrication strategy that utilizes an undercut sacrificial layer in the lift-off process to achieve fine-pitched metal bump arrays. The influences of sacrificial layer thickness and developing time on the undercut degree, as well as their effects on the morphology and dimensional consistency of bumps, are investigated. It is observed that increasing the developing time leads to a higher degree of undercut, not only facilitating the lift-off of the sacrificial layer but also resulting in an increased base radius of the metal bumps. By optimizing process parameters, we successfully achieved Au bump arrays with a base radius around 0.99 mu m, top radius around 0.3 mu m, and a pitch size of 1.4 mu m, exhibiting height nonuniformity below 5%. This fabrication strategy for uniform metal bump arrays with ultra-high density will greatly contribute to advancing Micro-LED technology towards high definition and high brightness.
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| GB/T 7714 | Lai, Zelei , Zou, Zhenyou , Ye, Jinyu et al. Fabrication of uniform submicron metal bump arrays based on undercut sacrificial layer for lift-off process [J]. | JOURNAL OF MATERIALS SCIENCE-MATERIALS IN ELECTRONICS , 2025 , 36 (12) . |
| MLA | Lai, Zelei et al. "Fabrication of uniform submicron metal bump arrays based on undercut sacrificial layer for lift-off process" . | JOURNAL OF MATERIALS SCIENCE-MATERIALS IN ELECTRONICS 36 . 12 (2025) . |
| APA | Lai, Zelei , Zou, Zhenyou , Ye, Jinyu , Lin, Yibin , Zhou, Xiongtu , Sun, Jie et al. Fabrication of uniform submicron metal bump arrays based on undercut sacrificial layer for lift-off process . | JOURNAL OF MATERIALS SCIENCE-MATERIALS IN ELECTRONICS , 2025 , 36 (12) . |
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GaN and related III-nitrides have attracted significant attention due to their excellent performance and extensive applications. However, the substrates for epitaxial growth of III-nitride films are limited to a few options, such as SiC, Si, and sapphire, which suffer from significant shortcomings including high cost, lattice mismatch, and thermal expansion coefficient mismatch. In this study, AlN film with c-axis orientation was deposited on a 2-inch polycrystalline Mo substrate using reactive magnetron sputtering, leveraging the advantages of Mo. Additionally, the influence of a two-dimensional graphene (Gr) insertion layer on the epitaxy of III-nitrides on Mo was investigated. The introduction of Gr slightly reduced the grain size of the AlN by about 10 nm. However, the Gr induced some in-plane tensile strain in the AlN film, which compensated the compressive strain in the subsequently grown GaN, resulting in a more undistorted GaN lattice with a c-axis strain of only 0.01 %. Continuous GaN films were successfully epitaxially grown on the sputtered AlN buffer layers, which are with c-axis preferred orientation and ultraviolet emission at similar to 3.36 eV. The grain size of GaN increased by about 5 nm and the full width at half maximum of the photoluminescence spectra also decreased by about 2.5 nm after the insertion of Gr. Our investigation indicates that Mo or Gr/Mo substrates are promising candidates for the heteroepitaxial growth of GaN films using sputtered AlN buffer layers. This work also provides a valuable strategy for low-cost and high-quality heteroepitaxy of other III-nitrides.
Keyword ：
AlN AlN GaN GaN Graphene Graphene Heteroepitaxy Heteroepitaxy Mo substrate Mo substrate
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| GB/T 7714 | Li, Yang , Chen, Jia , Pan, Kui et al. Polycrystalline Mo as the substrate for heteroepitaxy of GaN using sputtered AlN buffer layer [J]. | JOURNAL OF CRYSTAL GROWTH , 2025 , 660 . |
| MLA | Li, Yang et al. "Polycrystalline Mo as the substrate for heteroepitaxy of GaN using sputtered AlN buffer layer" . | JOURNAL OF CRYSTAL GROWTH 660 (2025) . |
| APA | Li, Yang , Chen, Jia , Pan, Kui , Chen, Qinzhong , Zhang, Ke , Lin, Zhihe et al. Polycrystalline Mo as the substrate for heteroepitaxy of GaN using sputtered AlN buffer layer . | JOURNAL OF CRYSTAL GROWTH , 2025 , 660 . |
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Micro light-emitting diode (Micro-LED) is considered as an ideal candidate for near-eye, outdoor display, and light field photography applications. At present, the commercialization of full-color Micro-LED is limited by the mass transfer of red, green, and blue (R-B-G) sub-pixels. Hence, we proposed a full-color scheme of vertically stacked tricolor Micro-LED layers to avoid mass transfer, which owns over 1000 PPI (pixel per inch). In this solution, the sidewall-insulated via in the epilayer plays a critical role to achieve the electrical and mechanical integration of three monochromatic Micro-LEDs with Si-based complementary metal-oxide semiconductor (CMOS) driver. Therefore, the via processes of GaN-based epilayer were investigated systematically using available semiconductor processes in this article. The inductively coupled plasma (ICP) etching was employed to create the ultra-small micro-structure array using SiO2 thin film as hard mask. Sidewall-insulated vias were fabricated with different aperture sizes (9.3, 7.5, and 3.4 mu m) and a depth of about 4-mu m. The vias with large aspect ratio are completely satisfy the requirement of designed vertical interconnection. This study aims to provide valuable reference for the commercial progress of high-resolution and full-color Micro-LEDs.
Keyword ：
ICP etching ICP etching Micro-LED Micro-LED Sidewall-insulated GaN via Sidewall-insulated GaN via Vertical interconnection Vertical interconnection
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| GB/T 7714 | Li, Yang , Zhang, Kaixin , Yang, Tianxi et al. Investigation of ultrasmall sidewall-insulated GaN via with large aspect ratio for the strategy of vertically stacked full-color Micro-LEDs [J]. | OPTICS COMMUNICATIONS , 2025 , 575 . |
| MLA | Li, Yang et al. "Investigation of ultrasmall sidewall-insulated GaN via with large aspect ratio for the strategy of vertically stacked full-color Micro-LEDs" . | OPTICS COMMUNICATIONS 575 (2025) . |
| APA | Li, Yang , Zhang, Kaixin , Yang, Tianxi , Nie, Junyang , Li, Qiwei , Zhou, Yijian et al. Investigation of ultrasmall sidewall-insulated GaN via with large aspect ratio for the strategy of vertically stacked full-color Micro-LEDs . | OPTICS COMMUNICATIONS , 2025 , 575 . |
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Nano-light-emitting diodes (LEDs) are ideal for ultra-high resolution displays due to their small size and high pixel density. However, traditional photolithography techniques fall short in meeting the requirements for nanoscale LED fabrication. Besides, as the size decreases and the specific surface area increases, non-radiative recombination generated by sidewalls defects becomes a significant issue, affecting the efficiency of nano-LEDs. To address this challenge, a nano-LED array with a single nanorod size of 800 nm was fabricated in this work by using nanosphere lithography and etching technology. Meanwhile, localized surface plasmons (LSPs) coupling technology was employed to enhance the PL efficiency of these nano-LEDs. By comparing with bare nano-LEDs, the PL intensity was boosted by about 43% and 129% when Ag and Ag@SiO2 nanoparticles were added separately. The existence of LSPs coupling process has been further confirmed through time-resolved photoluminescence measurement and finite element simulation analysis of different samples. The results provide compelling evidence for the LSPs coupling technology in enhancing the efficiency of nanoscale LEDs.
Keyword ：
micro-LED micro-LED nanorod nanorod photoluminescence photoluminescence
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| GB/T 7714 | Du, Zaifa , Fang, Aoqi , Tang, Penghao et al. Photoluminescence intensity enhancement of nanorod micro-LEDs via localized surface plasmon coupling [J]. | JOURNAL OF PHYSICS D-APPLIED PHYSICS , 2025 , 58 (5) . |
| MLA | Du, Zaifa et al. "Photoluminescence intensity enhancement of nanorod micro-LEDs via localized surface plasmon coupling" . | JOURNAL OF PHYSICS D-APPLIED PHYSICS 58 . 5 (2025) . |
| APA | Du, Zaifa , Fang, Aoqi , Tang, Penghao , Fan, Xinmin , Sun, Jie , Guo, Weiling et al. Photoluminescence intensity enhancement of nanorod micro-LEDs via localized surface plasmon coupling . | JOURNAL OF PHYSICS D-APPLIED PHYSICS , 2025 , 58 (5) . |
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Significance Micro-LED displays have excellent performance, such as high brightness, high resolution, vivid colors, long lifespan, and fast response speed. They are expected to become disruptive display technology following liquid crystal display (LCD) and organic light emitting diode (OLED), especially in fields like micro-projection, near-eye displays, and others. However, these fields urgently require display devices with high light efficiency and good directivity. The light extraction efficiency and beam shaping of Micro-LEDs have become pressing challenges for researchers and industry. Light extraction technologies, such as Micro-LED sidewall repair, surface random roughening, and surface photonic crystal technology, have been developed. For beam shaping, there are Micro-LED beam modulation designs based on structures like microlenses, metasurfaces, and resonant cavities. Due to these technologies, Micro-LEDs can be effectively used in near-eye display applications. Progress In this study, we have reviewed and analyzed many Micro-LED-related design solutions. We summarize the advantages and disadvantages of these options and discuss aspects related to manufacturing design, process costs, material selection, etc. Through comparison, it can be concluded that photonic crystal technology is effective in improving the light extraction efficiency of Micro-LEDs. However, there are some drawbacks, such as difficulty in obtaining a directional light source, the challenges of manufacturing photonic crystals, and the high production costs. Microlens technology performs well in light field control, but its effect on Micro-LED light extraction efficiency is not significant. Metasurface technology presents high processing difficulty and costs, but it offers significant beam-shaping effects. Resonant cavity structures can effectively enhance light extraction efficiency and achieve precise beam shaping in Micro-LEDs. However, their implementation faces substantial challenges in fabrication process and structural design complexity. Sidewall repair and rough surface technologies are more effective in improving Micro-LED light extraction efficiency. These classic examples help us better understand and study Micro-LED technology. Conclusions and Prospects With the development of Micro-LED technology, we believe that costs will be reduced soon. Micro-LED development is expected to usher in a breakthrough. Surface roughening and sidewall passivation technologies also have room for improvement. The Micro-lens array is easier to realize at the process level. Metasurface technology, photonic crystal technology, micro-cavity structures, and other research areas are experiencing a development boom. In the application of Micro-LED displays, they can be combined with artificial intelligence (AI) technology. We can use AI algorithms to design and optimize structures. Additionally, AI can improve accuracy and reduce labor costs, to realize the application of 'AI+ Micro-LED Display'. AI algorithms can automatically identify and repair wafer defects in Micro-LED manufacturing. They can also analyze chip position deviations during mass transfer and adjust process parameters in real-time to improve yields. In terms of user demand analysis, AI optimizes color calibration, brightness adjustment, and other parameters of Micro-LED displays to enhance the immersive experience of AR/VR devices. In the field of visible light communication integration, 'AI+ Micro-LED Display' can simultaneously realize display and high-speed optical communication functions, such as pulse-width modulation. The in-depth application of AI technology provides more possibilities for Micro-LED display products. Through natural language processing technology, users can interact more intelligently with devices using voice commands. However, there are also challenges to the adaptability of AI technology. AI model training requires a large amount of manufacturing data, but the lack of a data-sharing mechanism between enterprises limits the universality of the algorithm. Additionally, the technical standards for Micro-LED combined with AI have not been unified, which may lead to compatibility issues and a lack of mature software. Hardware ecosystems may also limit the expansion of application scenarios. In addition, quantum dot materials offer high color purity and saturation, which makes them highly suitable for Micro-display applications. Micro-LED light extraction and beam shaping technologies can be combined with quantum dots and other innovations to achieve high-efficiency, full-color displays. As research progresses, we believe that these technical challenges can be overcome, thus paving the way for the more widespread market adoption of Micro-LED technology. © 2025 Chinese Optical Society. All rights reserved.
Keyword ：
Drawing (forming) Drawing (forming) Fluorescent lamps Fluorescent lamps Liquid crystal displays Liquid crystal displays Microcrystals Microcrystals Microfabrication Microfabrication Microlenses Microlenses Pressing (forming) Pressing (forming) Refining Refining Surface mount technology Surface mount technology
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| GB/T 7714 | Yan, Qun , Liang, Tao , Zhang, Kaixin et al. Light Extraction and Shaping Technique for Micro-LED Displays (Invited) [J]. | Acta Optica Sinica , 2025 , 45 (8) . |
| MLA | Yan, Qun et al. "Light Extraction and Shaping Technique for Micro-LED Displays (Invited)" . | Acta Optica Sinica 45 . 8 (2025) . |
| APA | Yan, Qun , Liang, Tao , Zhang, Kaixin , Yao, Ziming , Fan, Zhengui , Lai, Wenzong et al. Light Extraction and Shaping Technique for Micro-LED Displays (Invited) . | Acta Optica Sinica , 2025 , 45 (8) . |
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This study aims to achieve high-yield micro-LED chip bonding and thus further advance the innovation of micro-LED interconnection technology. In this research, an electroless plating method was used to achieve the highly uniform nickel bump arrays on a thin-film transistor (TFT) driver substrate. Initially, the photoresists AZ4620 and AZ2070 are chosen for the experiments, which can cover the step structure uniformly of TFT substrate. Subsequently, the shape of bumps on the TFT substrate influenced by the plasma treatment and the deposition time was investigated. The result indicated that microbump arrays with a uniformity of less than 1% could be successfully fabricated by employing a 5-min plasma treatment and incorporating surfactant additions at concentrations of 0.02%, and the process of preparation has a high repeatability, which lays a solid foundation for the subsequent electroless plating bonding, and provides a critical reference for the breakthrough of micro-LED interconnection key technology.
Keyword ：
electroless plating electroless plating highly uniform highly uniform micro-LED micro-LED nickel bump nickel bump
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| GB/T 7714 | Wang, Shuaishuai , Lu, Yu , Zhang, Kaixin et al. Electroless fabrication of super uniform nickel bumps on the TFT driver substrates for micro-LED display [J]. | JOURNAL OF THE SOCIETY FOR INFORMATION DISPLAY , 2025 , 33 (7) : 852-860 . |
| MLA | Wang, Shuaishuai et al. "Electroless fabrication of super uniform nickel bumps on the TFT driver substrates for micro-LED display" . | JOURNAL OF THE SOCIETY FOR INFORMATION DISPLAY 33 . 7 (2025) : 852-860 . |
| APA | Wang, Shuaishuai , Lu, Yu , Zhang, Kaixin , Huang, Zhonghang , Yang, Tianxi , Lin, Chang et al. Electroless fabrication of super uniform nickel bumps on the TFT driver substrates for micro-LED display . | JOURNAL OF THE SOCIETY FOR INFORMATION DISPLAY , 2025 , 33 (7) , 852-860 . |
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In order to reduce the reverse leakage current of gallium nitride (GaN) p-i-n diode and improve the switching ratio of the device, the preparation process of GaN based quasi-vertical p-i-n diode was optimized from three aspects. First, the effects of metal and oxide etching masks on GaN step etching were compared, and it was found that the device etched with metal nickel (Ni) mask had better positive characteristics than silicon dioxide (SiO2) mask. Secondly, sidewall treatment was used to repair the damaged sidewall after etching, and the repair mechanism was discussed. Finally, the passivation layer was prepared by low temperature and high temperature growth respectively, and the performance of the device under different process conditions was compared. After the optimization of the preparation process, the leakage current of the quasi-vertical p-i-n diode was reduced by three orders of magnitude compared with the control group. The optimized device exhibits an ideal factor n of 1.12, turn-on voltage (Von) of 3.34 V, specific on-resistance (Ron,sp) of 2.27 m Omega & sdot; cm(2), positive and negative current density of 161.54 A/cm(2) and 2.55x10(-9 )A/cm(2), respectively, and a switching ratio of 6.35x10(10) .
Keyword ：
Anodes Anodes Cathodes Cathodes Epitaxial growth Epitaxial growth Etching Etching Gallium nitride Gallium nitride GaN GaN leakage current leakage current Leakage currents Leakage currents Nickel Nickel Optimization Optimization Passivation Passivation passivation layer optimization passivation layer optimization P-i-n diodes P-i-n diodes quasi-vertical diode quasi-vertical diode sidewall repair sidewall repair
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| GB/T 7714 | Ren, Zihan , Xu, Xiucheng , Guo, Weiling et al. Optimizing the Preparation Process of Quasi-Vertical GaN p-i-n Diode to Reduce Reverse Leakage and Increase Switching Ratio [J]. | IEEE JOURNAL OF QUANTUM ELECTRONICS , 2025 , 61 (2) . |
| MLA | Ren, Zihan et al. "Optimizing the Preparation Process of Quasi-Vertical GaN p-i-n Diode to Reduce Reverse Leakage and Increase Switching Ratio" . | IEEE JOURNAL OF QUANTUM ELECTRONICS 61 . 2 (2025) . |
| APA | Ren, Zihan , Xu, Xiucheng , Guo, Weiling , Gao, Haoran , Xu, Wanyu , Sun, Jie . Optimizing the Preparation Process of Quasi-Vertical GaN p-i-n Diode to Reduce Reverse Leakage and Increase Switching Ratio . | IEEE JOURNAL OF QUANTUM ELECTRONICS , 2025 , 61 (2) . |
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Waveguide coupling design is one of the most challenging topics in augmented reality (AR) near-eye displays (NED). The primary challenge stems from the necessity to simultaneously address two competing factors: the overall volume of the AR system and the occurrence of chromatic aberration. To address this issue, what we believe to be a novel tandem trilayer achromatic metasurface is specifically designed for waveguide coupling in AR NEDs, capable of achieving an achromatic effect in a nanometer-thin layer. By analyzing the influence of unit structure parameters on the phase delay of input electromagnetic waves, the optimal parameters are determined and the tandem trilayer achromatic metasurface structure is established. Simulation results show that the incident light can be deflected by 45 degrees, 46 degrees, and 45 degrees at wavelengths of 440 nm 470 nm, 520 nm 550 nm, and 620 nm 660 nm, respectively. The angular deviation error of the three primary colors is maintained lower than 1 degrees in the AR waveguide, ensuring a satisfactory achromatic effect. This design provides a new solution for developing ultra-thin and compact optical systems for full-color AR NEDs.
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| GB/T 7714 | Zhang, Kaixin , Fan, Zhengui , Chen, Kangkang et al. Tandem achromatic metasurface for waveguide coupling in full-color AR displays [J]. | OPTICS EXPRESS , 2025 , 33 (2) : 2019-2030 . |
| MLA | Zhang, Kaixin et al. "Tandem achromatic metasurface for waveguide coupling in full-color AR displays" . | OPTICS EXPRESS 33 . 2 (2025) : 2019-2030 . |
| APA | Zhang, Kaixin , Fan, Zhengui , Chen, Kangkang , Lin, Jiale , Huang, Chunlei , Nie, Junyang et al. Tandem achromatic metasurface for waveguide coupling in full-color AR displays . | OPTICS EXPRESS , 2025 , 33 (2) , 2019-2030 . |
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