Lateral　flow　immunoassay　(LFIA)　is　widely　utilized　in　a　variety　of　point-of-care-test　(POCT)　applications.　In　this　paper,　we　discuss　the　development　of　an　ASIC　based　strip　reader　controller　for　LFIA.　The　control　algorithm　was　proposed　and　implemented　in　Verilog　HDL　and　fabricated　into　ASIC　with　0.18　mu　m　CMOS　technology.　Functional　validation　on　both　FPGA　and　ASIC　implementations　were　presented.　The　ASIC　controller　occupied　0.946　mm(2)　area　and　drawn　only　2710.39　mu　W　running　at　the　frequency　of　50　MHz.　High　sensitivity　was　achieved　in　the　quantitative　LFIA　detection　experiments,　indicating　this　ASIC　chip　has　fulfilled　the　requirement　of　operating　an　integrated　and　portable　LFIA　strip　reading　system.