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author:

Wang, Chao-Hung (Wang, Chao-Hung.) [1] | Wu, Yen-Yi (Wu, Yen-Yi.) [2] | Chen, Jianli (Chen, Jianli.) [3] | Chang, Yao-Wen (Chang, Yao-Wen.) [4] | Kuo, Sy-Yen (Kuo, Sy-Yen.) [5] | Zhu, Wenxing (Zhu, Wenxing.) [6] (Scholars:朱文兴) | Fan, Genghua (Fan, Genghua.) [7] (Scholars:范更华)

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EI Scopus

Abstract:

For circuit designs in advanced technologies, standard-cell libraries consist of cells with different heights; for example, the number of fins determines the height of cells in the Fin FET technology. Cells of larger heights give higher drive strengths, but consume larger areas and power. Such mixed cell heights incur new, complicated challenges for layout designs, due mainly to the heterogeneity in cell dimensions and thus their larger solution spaces. There is not much published work on layout designs with mixed-height standard cells. This paper addresses the legalization problem of mixed-height standard cells, which intends to place cells without any overlap and with minimized displacement. We first study the properties of Abacus, generally considered the best legalization method for traditional single-row-height standard cells but criticized not suitable for handling the new challenge, analyze the capability and insufficiencies of Abacus for tackling the new problem, and remedy Abacuss insufficiencies and extend its advantages to develop an effective and efficient algorithm for the addressed problem. For example, dead spaces become a critical issue in mixed-cell-height legalization, which cannot be handled well with an Abacus variant alone. We thus derive a dead-space-aware objective function and an optimization scheme to handle this issue. Experimental results show that our algorithm can achieve the best wirelength among all published methods in reasonable running time, e.g., about 50% smaller wirelength increase than a state-of-the-art work. © 2017 IEEE.

Keyword:

Authentication Cells Computer aided design Contracts Cytology FinFET Fins (heat exchange) Mathematical instruments

Community:

  • [ 1 ] [Wang, Chao-Hung]Graduate Institute of Electronics Engineering, National Taiwan University, Taipei; 106, Taiwan
  • [ 2 ] [Wu, Yen-Yi]Graduate Institute of Electronics Engineering, National Taiwan University, Taipei; 106, Taiwan
  • [ 3 ] [Chen, Jianli]Center for Discrete Mathematics and Theoretical Computer Science, Fuzhou University, Fuzhou; 350002, China
  • [ 4 ] [Chang, Yao-Wen]Graduate Institute of Electronics Engineering, National Taiwan University, Taipei; 106, Taiwan
  • [ 5 ] [Chang, Yao-Wen]Department of Electrical Engineering, National Taiwan University, Taipei; 106, Taiwan
  • [ 6 ] [Kuo, Sy-Yen]Graduate Institute of Electronics Engineering, National Taiwan University, Taipei; 106, Taiwan
  • [ 7 ] [Kuo, Sy-Yen]Department of Electrical Engineering, National Taiwan University, Taipei; 106, Taiwan
  • [ 8 ] [Zhu, Wenxing]Center for Discrete Mathematics and Theoretical Computer Science, Fuzhou University, Fuzhou; 350002, China
  • [ 9 ] [Fan, Genghua]Center for Discrete Mathematics and Theoretical Computer Science, Fuzhou University, Fuzhou; 350002, China

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Year: 2017

Volume: 0

Page: 450-455

Language: English

Cited Count:

WoS CC Cited Count:

SCOPUS Cited Count: 46

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 1

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