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author:

Wei, Cong (Wei, Cong.) [1] | Wei, Rongshan (Wei, Rongshan.) [2] (Scholars:魏榕山) | He, Minghua (He, Minghua.) [3]

Indexed by:

EI SCIE

Abstract:

This study introduces a new bootstrapped switch for improving sampling linearity. In this technology, the introduction of a negative-voltage bootstrap capacitor reduces the parasitic capacitance at the critical signal node, thus improving its linearity. The proposed circuit is simulated using 0.18-mu m complementary metal-oxide-semiconductor technology. The parasitic capacitance of the proposed scheme is approximately 30% lower than that of the conventional structure. In the case of rail-to-rail input, the proposed switch achieves a signal-to-noise-plus-distortion ratio (SNDR) of 83.3 dB and a spurious-free dynamic range (SFDR) of 82.3 dB from a 1.2-V supply at a 50-MHz sampling rate. The SFDR and SNDR of the proposed bootstrapped switch increase by 11.7 and 12.7 dB, respectively, compared with those of conventional bootstrapped switches.

Keyword:

bootstrapped switch linearity low voltage

Community:

  • [ 1 ] [Wei, Cong]Fuzhou Univ, Sch Phys & Informat Engn, Fuzhou 350116, Peoples R China
  • [ 2 ] [Wei, Rongshan]Fuzhou Univ, Sch Phys & Informat Engn, Fuzhou 350116, Peoples R China
  • [ 3 ] [He, Minghua]Fujian Med Univ, Fuzhou 350122, Peoples R China

Reprint 's Address:

  • 魏榕山

    [Wei, Rongshan]Fuzhou Univ, Sch Phys & Informat Engn, Fuzhou 350116, Peoples R China

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Source :

IEICE ELECTRONICS EXPRESS

ISSN: 1349-2543

Year: 2021

Issue: 7

Volume: 18

0 . 7 0 9

JCR@2021

0 . 8 0 0

JCR@2023

ESI Discipline: ENGINEERING;

ESI HC Threshold:105

JCR Journal Grade:4

CAS Journal Grade:4

Cited Count:

WoS CC Cited Count: 1

SCOPUS Cited Count: 1

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 0

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