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author:

Lan, Shuqiong (Lan, Shuqiong.) [1] | Wang, Xiaoyan (Wang, Xiaoyan.) [2] | Yu, Rengjian (Yu, Rengjian.) [3] | Zhou, Changjie (Zhou, Changjie.) [4] | Wang, Minshuai (Wang, Minshuai.) [5] | Cai, Xiaomei (Cai, Xiaomei.) [6]

Indexed by:

EI Scopus SCIE

Abstract:

Traditional Von-Neumann computers would not meet the needs of storage and processing a large amount of information in the era of artificial intelligence owing to the separated storage and processing unit. Inspired by the human brain, various electronic devices have been developed for neuromorphic computing to conquer the von Neumann bottleneck. Organic synaptic transistors have attracted increasing interest due to their advantages of low cost, flexibility and ease of solution fabrication. However, most synaptic transistors based on the charge trapping principle use a single material, which limits the adjustment of synaptic plasticity. Here, a novel synaptic device based on a hybrid trapping layer was proposed and investigated. The device with a hybrid trapping layer exhibits a larger memory window than the device with a trapping layer based on single material, indicating that the device with hybrid trapping has a larger trapping capability. Moreover, our synaptic device was utilized to successfully simulate typical synaptic properties: excitatory postsynaptic current, inhibitory postsynaptic current, paired-pulse facilitation, paired-pulse depression and the transition from short-term plasticity to long-term plasticity. Furthermore, an artificial neural network was simulated and exhibited a high recognition accuracy. Therefore, the proposed device could promote the development of highly efficient neuromorphic computing systems.

Keyword:

Electrets hybrid trapping layer Logic gates memory Neuromorphic engineering Neurons Organic synaptic transistor Silicon Synapses synaptic plasticity Transistors

Community:

  • [ 1 ] [Lan, Shuqiong]Jimei Univ, Sch Sci, Dept Phys, Xiamen 361021, Peoples R China
  • [ 2 ] [Wang, Xiaoyan]Jimei Univ, Sch Sci, Dept Phys, Xiamen 361021, Peoples R China
  • [ 3 ] [Zhou, Changjie]Jimei Univ, Sch Sci, Dept Phys, Xiamen 361021, Peoples R China
  • [ 4 ] [Wang, Minshuai]Jimei Univ, Sch Sci, Dept Phys, Xiamen 361021, Peoples R China
  • [ 5 ] [Cai, Xiaomei]Jimei Univ, Sch Sci, Dept Phys, Xiamen 361021, Peoples R China
  • [ 6 ] [Yu, Rengjian]Fuzhou Univ, Inst Optoelect Display, Natl & Local United Engn Lab Flat Panel Display T, Fuzhou 350002, Peoples R China

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Source :

IEEE ELECTRON DEVICE LETTERS

ISSN: 0741-3106

Year: 2022

Issue: 8

Volume: 43

Page: 1255-1258

4 . 9

JCR@2022

4 . 1 0 0

JCR@2023

ESI Discipline: ENGINEERING;

ESI HC Threshold:66

JCR Journal Grade:2

CAS Journal Grade:2

Cited Count:

WoS CC Cited Count: 10

SCOPUS Cited Count: 10

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 2

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