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We propose a novel technology called depolarization field engineered ferroelectric mechanical transistor (Fe-MT), which achieves an exceptionally low operating voltage (V-DD) of 0.3 volts. This achievement of VDD scaling is made possible by utilizing depolarization voltage with an amplitude of 11/-11.1 V for the pre-shrinkage of contact gap (g(C)) [Fig. 1], which is activated by a + 63/-66 V pulse stimulus. Additionally, our Fe-MTs maintain the device level reconfigurability between N/P modes. This exciting development suggests that our Fe-MTs can serve as the fundamental building blocks for future generations of integrated circuits with high energy and area-efficiency.
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IEEE ELECTRON DEVICE LETTERS
ISSN: 0741-3106
Year: 2023
Issue: 12
Volume: 44
Page: 2063-2066
4 . 1
JCR@2023
4 . 1 0 0
JCR@2023
JCR Journal Grade:2
CAS Journal Grade:2
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ESI Highly Cited Papers on the List: 0 Unfold All
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30 Days PV: 0
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