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Abstract:
A novel nonvolatile floating-gate transistor memory device using CdSe@ZnS quantum dots (QDs) embedded the insulating polymer as a charge-storage layer along with the rational design of device structure is presented. The core-shell structure CdSe@ZnS QDs can efficiently trap both holes and electrons under the applied writing/erasing operations, resulting in a considerable threshold voltage shifts (Delta V-TH) over 50 V and forming high-conductance (ON) and low-conductance (OFF) states at a gate voltage of 0 V. The value of threshold voltage shift is controlled by writing and erasing voltages, regardless with source-drain voltages. Furthermore, it exhibits a long retention time (the Delta V-TH can maintain 76% at 108 s) and outstanding endurance characteristics (> 500 cycles), demonstrating extraordinary stable and reliable memory property. Moreover, a thin layer of Al2O3 was introduced as tunneling dielectric layer which is essential for the high-performance floating-gate transistor memory device. The nonvolatile organic transistor memory devices using QDs-based floating gate show great potential application for high-performance organic memory devices.
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IEEE TRANSACTIONS ON ELECTRON DEVICES
ISSN: 0018-9383
Year: 2017
Issue: 9
Volume: 64
Page: 3816-3821
2 . 6 2
JCR@2017
2 . 9 0 0
JCR@2023
ESI Discipline: ENGINEERING;
ESI HC Threshold:177
JCR Journal Grade:2
CAS Journal Grade:3
Cited Count:
WoS CC Cited Count: 25
SCOPUS Cited Count: 29
ESI Highly Cited Papers on the List: 0 Unfold All
WanFang Cited Count:
Chinese Cited Count:
30 Days PV: 1
Affiliated Colleges: