Micro-light-emitting　diode　(Micro-LED)　displays　have　attracted　growing　attention　due　to　their　unsurpassed　properties　that　satisfy　the　requirements　of　reality/virtual　reality　(AR/VR)　displays.　A　crucial　procedure　of　monolithic　integration　technology　in　high-density　microdisplays　is　the　interconnection　process,　which　is　intimately　associated　with　the　quality　of　the　display　device.　Microfluidic　electroless　interconnection　(MELI),　an　innovative　low-temperature　and　pressure-free　chip-stacking　approach　that　eliminates　the　warpage-induced　issues　and　cracking　damage　of　the　chip　caused　by　thermo-compression　bonding　(TCB),　holds　great　promise　as　a　technology　for　establishing　interconnections　between　the　CMOS　driver　and　Micro-LED.　However,　the　requirement　for　the　consistency　of　the　microbump　arrays　and　the　risk　of　creating　bridges　is　significantly　intensified　with　smaller　gaps　in　stacked　chips,　which　restricts　the　application　range　of　MELI　to　high-density　interconnects.　This　paper　analyzes　the　feasibility　of　further　lowering　the　stand-off　height　of　stacked　chips　in　ultrafine　pitch　interconnects　by　optimizing　the　bump　preparation　process.　The　plasma　modification　time　and　surfactant　concentration　during　the　bump　preparation　process　have　been　investigated.　The　result　indicated　that　microbump　arrays　with　a　uniformity　of　less　than　3%　could　be　successfully　manufactured　by　employing　a　7-min　plasma　treatment　and　incorporating　optimal　surfactants,　which　catalyzes　the　implementation　of　the　subsequent　vertical　interconnection　process　and　eventually　enhances　yields　of　Micro-LEDs.