Escape　routing　is　a　crucial　step　in　printed　circuit　board　(PCB)　design.　In　response　to　the　issues　of　low　wiring　efficiency　in　large-scale　pin　array　circuit　board　routing　where　multiple　devices　synchronization　is　not　considered　in　the　current　escape　algorithm,　this　paper　proposes　a　simultaneous　escape　routing　algorithm　based　on　weighted　maximum　independent　set.　Firstly,　a　path　conflict　graph　is　constructed　by　projecting　paths　correlated　to　pin　pairs,　followed　by　obtaining　layered　ordering　results　using　the　weighted　maximum　independent　set　model.　Subsequently,　channel　estimation　and　channel　optimization　are　performed　using　depth-first　search　in　different　directions.　Finally,　an　escape　routing　is　conducted　using　a　detailed　grid-based　wiring　method.　Experimental　results　demonstrate　that　the　proposed　algorithm　achieves　a　near　100%　successful　routing　rate　for　large-scale　pin　array　PCB　cases.　It　outperforms　the　minimum　cost　multi-commodity　flow　(MMCF)　algorithm　and　the　sequential　escape　algorithm　with　estimated　functions　by　an　average　improvement　of　10%　in　wire　length.