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author:

Chen, Jianli (Chen, Jianli.) [1] | Chang, Yao-Wen (Chang, Yao-Wen.) [2] | Huang, Yu-Chen (Huang, Yu-Chen.) [3]

Indexed by:

Scopus SCIE

Abstract:

Modern electron-beam lithography (EBL) suffers from the long-range fogging effect that incurs undesired excessive exposure and thus layout pattern distortions. In this article, we propose an analytical placement algorithm to tackle the fogging effect. The underlying idea is to place standard cells, guided by our efficient, yet reasonably accurate fogging effect model, to minimize the fogging variation during placement, and thus the effect can be corrected by reducing dosage uniformly over the chip. We derive a fogging source modeling and further develop an efficient, accurate evaluation scheme to estimate the fogging effect by the fast Gauss transform with the Hermite expansion. The scheme achieves a 30.2X speedup over the traditional convolution computation, with only about 2.35% absolute average errors, which enables the iterative evaluation and variation minimization of the effect during global placement. We also develop fogging-aware legalization and detailed placement to further optimize the placement quality, while limiting fogging variation. The experimental results show that our algorithm can effectively reduce the fogging variation by 35.4%, while maintaining high wirelength quality, at reasonable runtime.

Keyword:

Analytical placement Computational modeling electron-beam lithography Electron beams fogging variation Gauss transform Hermite expansion layout Layout Lenses Lithography Resists Substrates

Community:

  • [ 1 ] [Chen, Jianli]Fudan Univ, State Key Lab ASIC & Syst, Shanghai 200433, Peoples R China
  • [ 2 ] [Chen, Jianli]Fuzhou Univ, Ctr Discrete Math & Theoret Comp Sci, Fuzhou 350000, Peoples R China
  • [ 3 ] [Chang, Yao-Wen]Natl Taiwan Univ, Grad Inst Elect Engn, Dept Elect Engn, Taipei 106, Taiwan
  • [ 4 ] [Chang, Yao-Wen]Natl Taiwan Univ, Dept Comp Sci & Informat Engn, Taipei 106, Taiwan
  • [ 5 ] [Huang, Yu-Chen]Natl Taiwan Univ, Grad Inst Elect Engn, Taipei 106, Taiwan

Reprint 's Address:

  • [Chang, Yao-Wen]Natl Taiwan Univ, Grad Inst Elect Engn, Dept Elect Engn, Taipei 106, Taiwan

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Source :

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS

ISSN: 0278-0070

Year: 2021

Issue: 3

Volume: 40

Page: 560-573

2 . 5 6 5

JCR@2021

2 . 7 0 0

JCR@2023

ESI Discipline: ENGINEERING;

ESI HC Threshold:105

JCR Journal Grade:3

CAS Journal Grade:3

Cited Count:

WoS CC Cited Count:

SCOPUS Cited Count:

ESI Highly Cited Papers on the List: 0 Unfold All

WanFang Cited Count:

Chinese Cited Count:

30 Days PV: 1

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